Support readback in SU-Servo mode via MISO #7
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This PR changes the pin mapping in SU-Servo mode.
Only PROTO_REV 9 firmware, on either Xilinx CoolRunner II CPLD (xc2c) or iCE40 targets, will receives this change.
Closes #6.
2b5b387acftod14eba7311WIP: Support readback in SU-Servo mode via MISOto Support readback in SU-Servo mode via MISO@@ -285,1 +287,4 @@With CS = 3, MASK_NU selects the source of MISO among the 4 DDS available.| MASK_NU | MISO Source |nit: it's more of a select (one from 4), rather than a mask (any of 4), although I understand the desire not to change the original signal name
I haven't tested this, but it seems altogether like a cleaner solution than the very limited half-duplex shift-register mode we use in Oxford (though we were constrained to also work on old CPLD versions and rev. 8, and didn't spot that we could steal one of the DDS diff pair lines). Assuming it works reliably in testing, just having straightforward readback via regular MISO seems as implemented here seems like the way to go.