CPLD/FPGA gateware on Urukul. Forked from https://github.com/quartiq/urukul

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README.md

Urukul CPLD code

Urukul overview

Urukul Schematics/Layout

NU-Servo

Building

Needs migen and Xilinx ISE. Assumes ISE is installed in /opt/Xilinx.

make

Flashing

With Digilent JTAG HS2 cable:

download firmware to dongle. Manually (adjust USB bus as needed):

/sbin/fxload -t fx2 -I /opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/xusb_xp2.hex -D /dev/bus/usb/001/*`cat /sys/bus/usb/devices/1-3/devnum`

or automatically via the udev rule:

SUBSYSTEM=="usb", ACTION="add", ATTR{idVendor}=="0403", ATTR{idProduct}=="6014", ATTR{manufacturer}=="Digilent", RUN+="/usr/bin/fxload -v -t fx2 -I /opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/xusb_xp2.hex -D $tempnode"

install xc3sprog
flash_xc3.sh jtaghs2
look for Verify: Success

License

GPLv3+