occheung d14eba7311 suservo: reorder EEM pins
- Assign MISO to EEM0[2];
- Move NU_CLK to EEM0[5];
- Remove NU_CS.
2025-10-14 16:58:30 +08:00
2025-10-14 16:58:30 +08:00
2025-10-14 16:58:30 +08:00
2025-07-30 09:52:26 +08:00
2025-08-21 09:42:19 +08:00
2018-10-17 15:31:45 +02:00

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Urukul CPLD code

Urukul overview

Urukul Schematics/Layout

NU-Servo

Supported Urukul Hardware Revision (HW_REV)

PLD HW_REV
XC2 CPLD 1.4, 1.5
iCE40 1.6+

Instructions for Xilinx CoolRunner-II CPLD (XC2 CPLD)

Sources are in the xc2c directory.

cd xc2c

Building

Needs migen and Xilinx ISE. Assumes ISE is installed in /opt/Xilinx.

make

Flashing

With Digilent JTAG HS2 cable:

  • download firmware to dongle. Manually (adjust USB bus as needed):
/sbin/fxload -t fx2 -I /opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/xusb_xp2.hex -D /dev/bus/usb/001/*`cat /sys/bus/usb/devices/1-3/devnum`

or automatically via the udev rule:

SUBSYSTEM=="usb", ACTION="add", ATTR{idVendor}=="0403", ATTR{idProduct}=="6014", ATTR{manufacturer}=="Digilent", RUN+="/usr/bin/fxload -v -t fx2 -I /opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/xusb_xp2.hex -D $tempnode"
  • install xc3sprog

  • flash_xc3.sh jtaghs2

  • look for Verify: Success

Instructions for iCE40 FPGA

Sources are in the ice40 directory.

cd ice40

Building

Needs migen, yosys, nextpnr, icestorm.

python urukul.py        # Builds non-SU-Servo firmware

To build the SU-Servo version of the firmware, add the --suservo argument when calling the script.

Flashing

Use kasli-i2c.

Otherwise you can also use an FT232H-based board. Connect the wires as follows. Top left is closest to the CPLD, right is facing the edge. Bottom is towards the end of the edge.

D4    D1
D2    D0
GND   X
X     X
D7    D6

Use iceprog (available with icestorm package):

iceprog build/urukul.bin      # non-SU-Servo
iceprog build/suservo.bin     # SU-Servo

License

GPLv3+

Description
CPLD/FPGA gateware on Urukul. Forked from https://github.com/quartiq/urukul
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