309 lines
9.2 KiB
Rust
309 lines
9.2 KiB
Rust
use stm32f4xx_hal::{
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adc::Adc,
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hal::{blocking::spi::Transfer, digital::v2::{InputPin, OutputPin}},
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gpio::{
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AF5, Alternate, Analog,
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gpioa::*,
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gpiob::*,
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gpioc::*,
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gpioe::*,
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gpiof::*,
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gpiog::*,
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GpioExt,
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Output, PushPull,
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Speed::VeryHigh,
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},
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rcc::Clocks,
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pwm::{self, PwmChannels},
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spi::{Spi, NoMiso},
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stm32::{ADC1, ADC2, ADC3, GPIOA, GPIOB, GPIOC, GPIOE, GPIOF, GPIOG, SPI2, SPI4, SPI5, TIM1, TIM3},
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time::U32Ext,
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};
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use crate::channel::{Channel0, Channel1};
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use crate::softspi::SoftSpi;
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pub struct DummyInputPin;
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impl InputPin for DummyInputPin {
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type Error = (); // `Void`
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fn is_high(&self) -> Result<bool, Self::Error> {
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Ok(false)
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}
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fn is_low(&self) -> Result<bool, Self::Error> {
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Ok(true)
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}
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}
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pub trait ChannelPins {
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type DacSpi: Transfer<u8>;
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type DacSync: OutputPin;
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type Shdn: OutputPin;
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type Adc;
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type VRefPin;
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type ItecPin;
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type DacFeedbackPin;
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type TecUMeasPin;
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}
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impl ChannelPins for Channel0 {
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type DacSpi = Dac0Spi;
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type DacSync = PE4<Output<PushPull>>;
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type Shdn = PE10<Output<PushPull>>;
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type Adc = Adc<ADC1>;
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type VRefPin = PA0<Analog>;
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type ItecPin = PA6<Analog>;
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type DacFeedbackPin = PA4<Analog>;
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type TecUMeasPin = PC2<Analog>;
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}
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impl ChannelPins for Channel1 {
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type DacSpi = Dac1Spi;
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type DacSync = PF6<Output<PushPull>>;
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type Shdn = PE15<Output<PushPull>>;
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type Adc = Adc<ADC2>;
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type VRefPin = PA3<Analog>;
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type ItecPin = PB0<Analog>;
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type DacFeedbackPin = PA5<Analog>;
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type TecUMeasPin = PC3<Analog>;
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}
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/// SPI peripheral used for communication with the ADC
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pub type AdcSpi = Spi<SPI2, (PB10<Alternate<AF5>>, PB14<Alternate<AF5>>, PB15<Alternate<AF5>>)>;
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pub type AdcNss = PB12<Output<PushPull>>;
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type Dac0Spi = SoftSpi<PE2<Output<PushPull>>, PE6<Output<PushPull>>, DummyInputPin>;
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type Dac1Spi = SoftSpi<PF7<Output<PushPull>>, PF9<Output<PushPull>>, DummyInputPin>;
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pub type TecUMeasAdc = Adc<ADC3>;
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pub struct ChannelPinSet<C: ChannelPins> {
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pub dac_spi: C::DacSpi,
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pub dac_sync: C::DacSync,
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pub shdn: C::Shdn,
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pub adc: C::Adc,
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pub vref_pin: C::VRefPin,
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pub itec_pin: C::ItecPin,
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pub dac_feedback_pin: C::DacFeedbackPin,
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pub tec_u_meas_pin: C::TecUMeasPin,
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}
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pub struct Pins {
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pub adc_spi: AdcSpi,
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pub adc_nss: AdcNss,
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pub tec_u_meas_adc: TecUMeasAdc,
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pub pwm: PwmPins,
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pub channel0: ChannelPinSet<Channel0>,
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pub channel1: ChannelPinSet<Channel1>,
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}
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impl Pins {
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/// Setup GPIO pins and configure MCU peripherals
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pub fn setup(
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clocks: Clocks,
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tim1: TIM1, tim3: TIM3,
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gpioa: GPIOA, gpiob: GPIOB, gpioc: GPIOC, gpioe: GPIOE, gpiof: GPIOF, gpiog: GPIOG,
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spi2: SPI2, spi4: SPI4, spi5: SPI5,
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adc1: ADC1, adc2: ADC2, adc3: ADC3,
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) -> Self {
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let gpioa = gpioa.split();
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let gpiob = gpiob.split();
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let gpioc = gpioc.split();
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let gpioe = gpioe.split();
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let gpiof = gpiof.split();
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let gpiog = gpiog.split();
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Self::setup_ethernet(
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gpioa.pa1, gpioa.pa2, gpioc.pc1, gpioa.pa7,
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gpioc.pc4, gpioc.pc5, gpiob.pb11, gpiog.pg13,
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gpiob.pb13
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);
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let adc_spi = Self::setup_spi_adc(clocks, spi2, gpiob.pb10, gpiob.pb14, gpiob.pb15);
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let adc_nss = gpiob.pb12.into_push_pull_output();
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let tec_u_meas_adc = Adc::adc3(adc3, true, Default::default());
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let pwm = PwmPins::setup(
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clocks, tim1, tim3,
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gpioc.pc6, gpioc.pc7,
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gpioe.pe9, gpioe.pe11,
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gpioe.pe13, gpioe.pe14
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);
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let (dac0_spi, dac0_sync) = Self::setup_dac0(
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clocks, spi4,
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gpioe.pe2, gpioe.pe4, gpioe.pe6
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);
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let mut shdn0 = gpioe.pe10.into_push_pull_output();
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let _ = shdn0.set_low();
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let mut adc0 = Adc::adc1(adc1, true, Default::default());
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adc0.enable();
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let vref0_pin = gpioa.pa0.into_analog();
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let itec0_pin = gpioa.pa6.into_analog();
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let dac_feedback0_pin = gpioa.pa4.into_analog();
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let tec_u_meas0_pin = gpioc.pc2.into_analog();
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let channel0 = ChannelPinSet {
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dac_spi: dac0_spi,
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dac_sync: dac0_sync,
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shdn: shdn0,
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adc: adc0,
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vref_pin: vref0_pin,
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itec_pin: itec0_pin,
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dac_feedback_pin: dac_feedback0_pin,
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tec_u_meas_pin: tec_u_meas0_pin,
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};
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let (dac1_spi, dac1_sync) = Self::setup_dac1(
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clocks, spi5,
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gpiof.pf7, gpiof.pf6, gpiof.pf9
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);
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let mut shdn1 = gpioe.pe15.into_push_pull_output();
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let _ = shdn1.set_low();
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let mut adc1 = Adc::adc2(adc2, true, Default::default());
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adc1.enable();
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let vref1_pin = gpioa.pa3.into_analog();
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let itec1_pin = gpiob.pb0.into_analog();
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let dac_feedback1_pin = gpioa.pa5.into_analog();
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let tec_u_meas1_pin = gpioc.pc3.into_analog();
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let channel1 = ChannelPinSet {
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dac_spi: dac1_spi,
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dac_sync: dac1_sync,
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shdn: shdn1,
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adc: adc1,
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vref_pin: vref1_pin,
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itec_pin: itec1_pin,
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dac_feedback_pin: dac_feedback1_pin,
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tec_u_meas_pin: tec_u_meas1_pin,
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};
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Pins {
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adc_spi, adc_nss,
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tec_u_meas_adc,
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pwm,
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channel0,
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channel1,
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}
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}
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/// Configure the GPIO pins for SPI operation, and initialize SPI
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fn setup_spi_adc<M1, M2, M3>(
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clocks: Clocks,
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spi2: SPI2,
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sck: PB10<M1>,
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miso: PB14<M2>,
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mosi: PB15<M3>,
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) -> AdcSpi
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{
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let sck = sck.into_alternate_af5();
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let miso = miso.into_alternate_af5();
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let mosi = mosi.into_alternate_af5();
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Spi::spi2(
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spi2,
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(sck, miso, mosi),
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crate::ad7172::SPI_MODE,
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crate::ad7172::SPI_CLOCK.into(),
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clocks
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)
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}
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fn setup_dac0<M1, M2, M3>(
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clocks: Clocks, spi4: SPI4,
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sclk: PE2<M1>, sync: PE4<M2>, sdin: PE6<M3>
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) -> (Dac0Spi, PE4<Output<PushPull>>) {
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let sclk = sclk.into_push_pull_output();
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let sdin = sdin.into_push_pull_output();
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let spi = SoftSpi::new(
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sclk, sdin, DummyInputPin,
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);
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let sync = sync.into_push_pull_output();
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(spi, sync)
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}
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fn setup_dac1<M1, M2, M3>(
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clocks: Clocks, spi5: SPI5,
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sclk: PF7<M1>, sync: PF6<M2>, sdin: PF9<M3>
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) -> (Dac1Spi, PF6<Output<PushPull>>) {
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let sclk = sclk.into_push_pull_output();
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let sdin = sdin.into_push_pull_output();
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let spi = SoftSpi::new(
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sclk, sdin, DummyInputPin,
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);
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let sync = sync.into_push_pull_output();
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(spi, sync)
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}
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/// Configure the GPIO pins for Ethernet operation
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fn setup_ethernet<M1, M2, M3, M4, M5, M6, M7, M8, M9>(
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pa1: PA1<M1>, pa2: PA2<M2>, pc1: PC1<M3>, pa7: PA7<M4>,
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pc4: PC4<M5>, pc5: PC5<M6>, pb11: PB11<M7>, pg13: PG13<M8>,
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pb13: PB13<M9>
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) {
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// PA1 RMII Reference Clock - SB13 ON
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pa1.into_alternate_af11().set_speed(VeryHigh);
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// PA2 RMII MDIO - SB160 ON
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pa2.into_alternate_af11().set_speed(VeryHigh);
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// PC1 RMII MDC - SB164 ON
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pc1.into_alternate_af11().set_speed(VeryHigh);
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// PA7 RMII RX Data Valid D11 JP6 ON
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pa7.into_alternate_af11().set_speed(VeryHigh);
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// PC4 RMII RXD0 - SB178 ON
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pc4.into_alternate_af11().set_speed(VeryHigh);
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// PC5 RMII RXD1 - SB181 ON
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pc5.into_alternate_af11().set_speed(VeryHigh);
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// PB11 RMII TX Enable - SB183 ON
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pb11.into_alternate_af11().set_speed(VeryHigh);
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// PG13 RXII TXD0 - SB182 ON
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pg13.into_alternate_af11().set_speed(VeryHigh);
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// PB13 RMII TXD1 I2S_A_CK JP7 ON
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pb13.into_alternate_af11().set_speed(VeryHigh);
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}
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}
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pub struct PwmPins {
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pub max_v0: PwmChannels<TIM3, pwm::C1>,
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pub max_v1: PwmChannels<TIM3, pwm::C2>,
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pub max_i_pos0: PwmChannels<TIM1, pwm::C1>,
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pub max_i_pos1: PwmChannels<TIM1, pwm::C2>,
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pub max_i_neg0: PwmChannels<TIM1, pwm::C3>,
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pub max_i_neg1: PwmChannels<TIM1, pwm::C4>,
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}
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impl PwmPins {
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fn setup<M1, M2, M3, M4, M5, M6>(
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clocks: Clocks,
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tim1: TIM1,
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tim3: TIM3,
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max_v0: PC6<M1>,
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max_v1: PC7<M2>,
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max_i_pos0: PE9<M3>,
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max_i_pos1: PE11<M4>,
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max_i_neg0: PE13<M5>,
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max_i_neg1: PE14<M6>,
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) -> PwmPins {
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let freq = 20u32.khz();
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let channels = (
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max_v0.into_alternate_af2(),
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max_v1.into_alternate_af2(),
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);
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let (max_v0, max_v1) = pwm::tim3(tim3, channels, clocks, freq);
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let channels = (
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max_i_pos0.into_alternate_af1(),
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max_i_pos1.into_alternate_af1(),
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max_i_neg0.into_alternate_af1(),
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max_i_neg1.into_alternate_af1(),
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);
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let (max_i_pos0, max_i_pos1, max_i_neg0, max_i_neg1) =
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pwm::tim1(tim1, channels, clocks, freq);
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PwmPins {
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max_v0, max_v1,
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max_i_pos0, max_i_pos1,
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max_i_neg0, max_i_neg1,
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}
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}
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}
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