M-Labs/thermostat
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software_dfu #46

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sb10q merged 8 commits from software_dfu into master 2021-01-13 11:59:06 +08:00
Conversation 5 Commits 8 Files Changed 5 +70 -32
2 changed files with 70 additions and 32 deletions
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43
src/dfu.rs Normal file
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@ -0,0 +1,43 @@
use cortex_m_rt::{pre_init};
const DFU_MSG_ADDR: usize = 0x2001BC00;
const DFU_TRIG_MSG: usize = 0xDECAFBAD;
pub unsafe fn trig_dfu() {
let dfu_msg_addr = DFU_MSG_ADDR as *mut usize;
*dfu_msg_addr = DFU_TRIG_MSG;
}
#[pre_init]
#[no_mangle]
unsafe fn __pre_init() {
let dfu_msg_addr = DFU_MSG_ADDR as *mut usize;
if *dfu_msg_addr == DFU_TRIG_MSG{
*dfu_msg_addr = 0x00000000;
const RCC_APB2ENR: *mut u32 = 0xE000_ED88 as *mut u32;
const RCC_APB2ENR_ENABLE_SYSCFG_CLOCK: u32 = 0x00004000;
sb10q commented 2021-01-12 16:36:44 +08:00
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core::ptr::write_volatile(
RCC_APB2ENR,
*RCC_APB2ENR | RCC_APB2ENR_ENABLE_SYSCFG_CLOCK,
);
const SYSCFG_MEMRMP: *mut u32 = 0x40013800 as *mut u32;
const SYSCFG_MEMRMP_MAP_ROM: u32 = 0x00000001;
core::ptr::write_volatile(
SYSCFG_MEMRMP,
*SYSCFG_MEMRMP | SYSCFG_MEMRMP_MAP_ROM,
);
asm!("LDR R0, =0x1FFF0000");
asm!("LDR SP,[R0, #0]");
asm!("LDR R0,[R0, #4]");
asm!("BX R0");
}
}

59
src/main.rs
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@ -13,7 +13,7 @@ use log::{error, info, warn};
use core::fmt::Write; use core::fmt::Write;
use cortex_m::asm::wfi; use cortex_m::asm::wfi;
use cortex_m_rt::{entry, pre_init}; use cortex_m_rt::{entry};
use stm32f4xx_hal::{ use stm32f4xx_hal::{
hal::watchdog::{WatchdogEnable, Watchdog}, hal::watchdog::{WatchdogEnable, Watchdog},
rcc::RccExt, rcc::RccExt,
@ -66,6 +66,7 @@ mod channel_state;
mod config; mod config;
use config::ChannelConfig; use config::ChannelConfig;
mod flash_store; mod flash_store;
mod dfu;
const HSE: MegaHertz = MegaHertz(8); const HSE: MegaHertz = MegaHertz(8);
#[cfg(not(feature = "semihosting"))] #[cfg(not(feature = "semihosting"))]
@ -77,9 +78,6 @@ const CHANNEL_CONFIG_KEY: [&str; 2] = ["ch0", "ch1"];
const TCP_PORT: u16 = 23; const TCP_PORT: u16 = 23;
const DFU_MSG_ADDR: usize = 0x2001BC00;
const DFU_TRIG_MSG: usize = 0xDECAFBAD;
fn send_line(socket: &mut TcpSocket, data: &[u8]) -> bool { fn send_line(socket: &mut TcpSocket, data: &[u8]) -> bool {
let send_free = socket.send_capacity() - socket.send_queue(); let send_free = socket.send_capacity() - socket.send_queue();
if data.len() > send_free + 1 { if data.len() > send_free + 1 {
@ -430,12 +428,9 @@ fn main() -> ! {
for i in 0..CHANNELS { for i in 0..CHANNELS {
channels.power_down(i); channels.power_down(i);
} }
unsafe { unsafe {
let dfu_msg_addr = DFU_MSG_ADDR as *mut usize; dfu::trig_dfu();
*dfu_msg_addr = DFU_TRIG_MSG;
} }
SCB::sys_reset(); SCB::sys_reset();
} }
} }
@ -488,36 +483,36 @@ fn main() -> ! {
unreachable!() unreachable!()
} }
#[pre_init] // #[pre_init]
#[no_mangle] // #[no_mangle]
unsafe fn __pre_init() { // unsafe fn __pre_init() {
let dfu_msg_addr = DFU_MSG_ADDR as *mut usize; // let dfu_msg_addr = DFU_MSG_ADDR as *mut usize;
if *dfu_msg_addr == DFU_TRIG_MSG{ // if *dfu_msg_addr == DFU_TRIG_MSG{
*dfu_msg_addr = 0x00000000; // *dfu_msg_addr = 0x00000000;
const RCC_APB2ENR: *mut u32 = 0xE000_ED88 as *mut u32; // const RCC_APB2ENR: *mut u32 = 0xE000_ED88 as *mut u32;
const RCC_APB2ENR_ENABLE_SYSCFG_CLOCK: u32 = 0x00004000; // const RCC_APB2ENR_ENABLE_SYSCFG_CLOCK: u32 = 0x00004000;
core::ptr::write_volatile( // core::ptr::write_volatile(
RCC_APB2ENR, // RCC_APB2ENR,
*RCC_APB2ENR | RCC_APB2ENR_ENABLE_SYSCFG_CLOCK, // *RCC_APB2ENR | RCC_APB2ENR_ENABLE_SYSCFG_CLOCK,
); // );
const SYSCFG_MEMRMP: *mut u32 = 0x40013800 as *mut u32; // const SYSCFG_MEMRMP: *mut u32 = 0x40013800 as *mut u32;
const SYSCFG_MEMRMP_MAP_ROM: u32 = 0x00000001; // const SYSCFG_MEMRMP_MAP_ROM: u32 = 0x00000001;
core::ptr::write_volatile( // core::ptr::write_volatile(
SYSCFG_MEMRMP, // SYSCFG_MEMRMP,
*SYSCFG_MEMRMP | SYSCFG_MEMRMP_MAP_ROM, // *SYSCFG_MEMRMP | SYSCFG_MEMRMP_MAP_ROM,
); // );
asm!("LDR R0, =0x1FFF0000"); // asm!("LDR R0, =0x1FFF0000");
asm!("LDR SP,[R0, #0]"); // asm!("LDR SP,[R0, #0]");
asm!("LDR R0,[R0, #4]"); // asm!("LDR R0,[R0, #4]");
asm!("BX R0"); // asm!("BX R0");
} // }
} // }