software_dfu #46
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@ -124,7 +124,7 @@ formatted as line-delimited JSON.
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| `load [0/1]` | Restore configuration for channel all/0/1 from flash |
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| `load [0/1]` | Restore configuration for channel all/0/1 from flash |
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| `save [0/1]` | Save configuration for channel all/0/1 to flash |
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| `save [0/1]` | Save configuration for channel all/0/1 to flash |
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| `reset` | Reset the device |
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| `reset` | Reset the device |
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| `dfu` | Reset device and enters USB device firmware update (DFU) mode |
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| `dfu` | Reset device and enters USB device firmware update (DFU) mode |
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| `ipv4 <X.X.X.X/L> [Y.Y.Y.Y]` | Configure IPv4 address, netmask length, and optional default gateway |
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| `ipv4 <X.X.X.X/L> [Y.Y.Y.Y]` | Configure IPv4 address, netmask length, and optional default gateway |
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5
memory.x
5
memory.x
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@ -3,12 +3,13 @@ MEMORY
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FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K
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FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K
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/* reserved for config data */
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/* reserved for config data */
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CONFIG (rx) : ORIGIN = 0x8100000, LENGTH = 16K
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CONFIG (rx) : ORIGIN = 0x8100000, LENGTH = 16K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 111K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112K - 4
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/* reserved for DFU trigger message */
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/* reserved for DFU trigger message */
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DFU_MSG (wrx) : ORIGIN = 0x2001BC00, LENGTH = 1K
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DFU_MSG (wrx) : ORIGIN = 0x2001BFFC, LENGTH = 4
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RAM2 (xrw) : ORIGIN = 0x2001C000, LENGTH = 16K
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RAM2 (xrw) : ORIGIN = 0x2001C000, LENGTH = 16K
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RAM3 (xrw) : ORIGIN = 0x20020000, LENGTH = 64K
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RAM3 (xrw) : ORIGIN = 0x20020000, LENGTH = 64K
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CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K
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CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K
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}
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}
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_stack_start = ORIGIN(CCMRAM) + LENGTH(CCMRAM);
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_stack_start = ORIGIN(CCMRAM) + LENGTH(CCMRAM);
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_dfu_msg = ORIGIN(DFU_MSG);
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47
src/dfu.rs
47
src/dfu.rs
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@ -1,28 +1,25 @@
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use cortex_m_rt::{pre_init};
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use cortex_m_rt::{pre_init};
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/// RAM location used to store DFU trigger message
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const DFU_TRIG_MSG: u32 = 0xDECAFBAD;
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const DFU_MSG_ADDR: usize = 0x2001BC00;
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/// DFU trigger message
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pub unsafe fn set_dfu_trigger() {
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const DFU_TRIG_MSG: usize = 0xDECAFBAD;
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extern "C" {
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static mut _dfu_msg: u32;
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/// Set DFU trigger
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}
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pub unsafe fn trig_dfu() {
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_dfu_msg = DFU_TRIG_MSG;
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let dfu_msg_addr = DFU_MSG_ADDR as *mut usize;
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*dfu_msg_addr = DFU_TRIG_MSG;
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}
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}
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/// Called by reset handler in lib.rs immediately after reset, checks if booting into dfu is needed
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/// Called by reset handler in lib.rs immediately after reset.
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/// This function should not be called outside of reset handler as
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/// bootloader expects MCU to be in reset state when called.
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#[pre_init]
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#[pre_init]
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unsafe fn __pre_init() {
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unsafe fn __pre_init() {
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extern "C" {
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static mut _dfu_msg: u32;
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}
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let dfu_msg_addr = DFU_MSG_ADDR as *mut usize;
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if _dfu_msg == DFU_TRIG_MSG {
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_dfu_msg = 0x00000000;
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// Check DFU trigger message
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if *dfu_msg_addr == DFU_TRIG_MSG{
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// Reset message
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*dfu_msg_addr = 0x00000000;
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// Enable system config controller clock
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// Enable system config controller clock
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const RCC_APB2ENR: *mut u32 = 0xE000_ED88 as *mut u32;
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const RCC_APB2ENR: *mut u32 = 0xE000_ED88 as *mut u32;
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@ -42,13 +39,13 @@ unsafe fn __pre_init() {
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*SYSCFG_MEMRMP | SYSCFG_MEMRMP_MAP_ROM,
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*SYSCFG_MEMRMP | SYSCFG_MEMRMP_MAP_ROM,
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);
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);
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// Set stack pointer to bootloader location
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asm!(
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asm!("LDR R0, =0x1FFF0000");
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// Set stack pointer to bootloader location
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asm!("LDR SP,[R0, #0]");
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"LDR R0, =0x1FFF0000",
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"LDR SP,[R0, #0]",
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// Jump to bootloader
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// Jump to bootloader
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asm!("LDR R0,[R0, #4]");
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"LDR R0,[R0, #4]",
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asm!("BX R0");
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"BX R0",
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);
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}
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}
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}
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}
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@ -429,8 +429,9 @@ fn main() -> ! {
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channels.power_down(i);
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channels.power_down(i);
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}
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}
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unsafe {
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unsafe {
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dfu::trig_dfu();
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dfu::set_dfu_trigger();
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}
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}
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socket.close();
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SCB::sys_reset();
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SCB::sys_reset();
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}
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}
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}
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}
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