Improve the VREF calibration routine #132

Merged
sb10q merged 1 commits from atse/thermostat:calibration-fix into master 2024-09-19 10:06:25 +08:00
Contributor

VREF was incorrectly calibrated on a new v2.2.2 board, which calibrates its zero current point to be 2.2V instead of 1.5V

This PR implements a fix to the calibration problem. The fix is similar to Kirdy and calibrates VREF consistently in constant time.
This can also prevent boot-looping.

Reference from Kirdy's calibration sequence at

pub fn calibrate_dac_value(&mut self) {
const DAC_BIT: u32 = 18;
const ADC_BIT: u32 = 12;
let target_voltage = self.max1968.adc_read(AdcReadTarget::VREF, 512);
let mut start_value = 1;
let mut best_error = ElectricPotential::new::<volt>(100.0);
for step in (DAC_BIT - ADC_BIT - 1..DAC_BIT).rev() {
let mut prev_value = start_value;
for value in (start_value..=ad5680::MAX_VALUE).step_by(1 << step) {
self.max1968.phy.dac.set(value).unwrap();
sys_timer::sleep(5);
let dac_feedback = self.max1968.adc_read(AdcReadTarget::DacVfb, 64);
let error = target_voltage - dac_feedback;
if error < ElectricPotential::new::<volt>(0.0) {
break;
} else if error < best_error {
best_error = error;
start_value = prev_value;
let vref = (value as f32 / ad5680::MAX_VALUE as f32) * self.max1968.dac_out_range;
self.set_center_pt(vref);
}
prev_value = value;
}
}
self.tec_settings.vref = target_voltage;
}
.

VREF was incorrectly calibrated on a new v2.2.2 board, which calibrates its zero current point to be 2.2V instead of 1.5V This PR implements a fix to the calibration problem. The fix is similar to Kirdy and calibrates VREF consistently in constant time. This can also prevent boot-looping. Reference from Kirdy's calibration sequence at https://git.m-labs.hk/M-Labs/kirdy/src/commit/a512614de535a6fb934ab848a1adc7b714f52eae/src/thermostat/thermostat.rs#L317-L344.
atse added 1 commit 2024-09-16 18:17:38 +08:00
* Fix wrong calibration of VREF on startup. Caused new v2.2.2 boards to
wrongly calibrate the zero-point to ~2.2 V instead of 1.5 V.

* Fix bootloop on some boards.

* Adjust watchdog interval accordingly.
mwojcik reviewed 2024-09-16 19:18:57 +08:00
@ -59,3 +59,3 @@
const HSE: MegaHertz = MegaHertz(8);
#[cfg(not(feature = "semihosting"))]
const WATCHDOG_INTERVAL: u32 = 1_000;
const WATCHDOG_INTERVAL: u32 = 2_000;
Owner

Did the change caused the watchdog to trigger?

Did the change caused the watchdog to trigger?
Owner

Yes. It takes longer time and causes the watchdog to trigger.
1.5s does not work.
1.75s works.
We chose 2.0s to leave some more margin.

Yes. It takes longer time and causes the watchdog to trigger. 1.5s does not work. 1.75s works. We chose 2.0s to leave some more margin.
Owner

Why does the calibration take so long? Is that something to be expected from the component datasheet values and the target performance?

Why does the calibration take so long? Is that something to be expected from the component datasheet values and the target performance?
sb10q merged commit 1041d3ecbb into master 2024-09-19 10:06:24 +08:00
Sign in to join this conversation.
No reviewers
No Label
No Milestone
No Assignees
4 Participants
Notifications
Due Date
The due date is invalid or out of range. Please use the format 'yyyy-mm-dd'.

No due date set.

Dependencies

No dependencies set.

Reference: M-Labs/thermostat#132
No description provided.