main: re-enable interrupts

also swap ADC polling and network processing to read the ADC first after
an interrupt.

Cargo.lock

@@ -355,7 +355,6 @@ dependencies = [
  "cortex-m",
  "cortex-m-log",
  "cortex-m-rt",
- "embedded-hal",
  "hash2hwaddr",
  "log",
  "nom",

Cargo.toml

@@ -21,7 +21,6 @@ bare-metal = "0.2"
 cortex-m = "0.6"
 cortex-m-rt = { version = "0.6", features = ["device"] }
 cortex-m-log = { version = "0.6", features = ["log-integration"] }
-embedded-hal = "0.2"
 # TODO: pending https://github.com/stm32-rs/stm32f4xx-hal/pull/125
 stm32f4xx-hal = { git = "https://github.com/thalesfragoso/stm32f4xx-hal", branch = "pwm-impl", features = ["rt", "stm32f427"] }
 stm32-eth = { version = "0.1.2", features = ["smoltcp-phy"], git = "https://github.com/stm32-rs/stm32-eth.git" }

src/ad5680.rs

@@ -1,8 +1,8 @@
-use embedded_hal::{
-    blocking::spi::Transfer,
-    digital::v2::OutputPin,
-};
 use stm32f4xx_hal::{
+    hal::{
+        blocking::spi::Transfer,
+        digital::v2::OutputPin,
+    },
     time::MegaHertz,
     spi,
 };

src/ad7172/adc.rs

@@ -1,7 +1,9 @@
 use core::fmt;
-use embedded_hal::digital::v2::OutputPin;
-use embedded_hal::blocking::spi::Transfer;
 use log::{info, warn};
+use stm32f4xx_hal::hal::{
+    blocking::spi::Transfer,
+    digital::v2::OutputPin,
+};
 use super::{
     regs::{self, Register, RegisterData},
     checksum::{ChecksumMode, Checksum},
@@ -184,8 +186,9 @@ impl<SPI: Transfer<u8, Error = E>, NSS: OutputPin, E: fmt::Debug> Adc<SPI, NSS>
             let checksum_out = checksum.result();
 
             let mut data = reg_data.clone();
-            let checksum_in = self.transfer(address, data.as_mut(), checksum_out)?;
+            self.transfer(address, data.as_mut(), checksum_out)?;
 
+            // Verification
             let readback_data = self.read_reg(reg)?;
             if *readback_data == **reg_data {
                 return Ok(());

src/main.rs

@@ -16,6 +16,7 @@ use cortex_m_rt::entry;
 use stm32f4xx_hal::{
     hal::{
         self,
+        digital::v2::OutputPin,
         watchdog::{WatchdogEnable, Watchdog},
     },
     rcc::RccExt,
@@ -92,14 +93,21 @@ fn main() -> ! {
     );
 
     let mut adc = ad7172::Adc::new(pins.adc_spi, pins.adc_nss).unwrap();
+    // Feature not used
+    adc.set_sync_enable(false).unwrap();
+    // Setup channels
     adc.setup_channel(0, ad7172::Input::Ain0, ad7172::Input::Ain1).unwrap();
     adc.setup_channel(1, ad7172::Input::Ain2, ad7172::Input::Ain3).unwrap();
     adc.calibrate_offset().unwrap();
+
     let mut dac0 = ad5680::Dac::new(pins.dac0_spi, pins.dac0_sync);
     dac0.set(0).unwrap();
     let mut dac1 = ad5680::Dac::new(pins.dac1_spi, pins.dac1_sync);
     dac1.set(0).unwrap();
+
     let mut pwm = pins.pwm;
+    let mut shdn0 = pins.shdn0;
+    let mut shdn1 = pins.shdn1;
 
     timer::setup(cp.SYST, clocks);
 
@@ -119,13 +127,6 @@ fn main() -> ! {
     net::run(dp.ETHERNET_MAC, dp.ETHERNET_DMA, hwaddr, |iface| {
         Server::<Session>::run(iface, |server| {
             loop {
-                let instant = Instant::from_millis(i64::from(timer::now()));
-                cortex_m::interrupt::free(net::clear_pending);
-                server.poll(instant)
-                    .unwrap_or_else(|e| {
-                        warn!("poll: {:?}", e);
-                    });
-
                 let instant = Instant::from_millis(i64::from(timer::now()));
                 // ADC input
                 adc.data_ready().unwrap().map(|channel| {
@@ -137,10 +138,14 @@ fn main() -> ! {
                     if state.pid_enabled {
                         // Forward PID output to i_set DAC
                         match channel {
-                            0 =>
-                                dac0.set(state.dac_value).unwrap(),
-                            1 =>
-                                dac1.set(state.dac_value).unwrap(),
+                            0 => {
+                                dac0.set(state.dac_value).unwrap();
+                                shdn0.set_high().unwrap();
+                            }
+                            1 => {
+                                dac1.set(state.dac_value).unwrap();
+                                shdn1.set_high().unwrap();
+                            }
                             _ =>
                                 unreachable!(),
                         }
@@ -149,9 +154,16 @@ fn main() -> ! {
                     server.for_each(|_, session| session.set_report_pending(channel.into()));
                 });
 
+                let instant = Instant::from_millis(i64::from(timer::now()));
+                cortex_m::interrupt::free(net::clear_pending);
+                server.poll(instant)
+                    .unwrap_or_else(|e| {
+                        warn!("poll: {:?}", e);
+                    });
+
                 // TCP protocol handling
                 server.for_each(|mut socket, session| {
-                    if ! socket.is_open() {
+                    if ! socket.is_active() {
                         let _ = socket.listen(TCP_PORT);
                         session.reset();
                     } else if socket.can_send() && socket.can_recv() && socket.send_capacity() - socket.send_queue() > 1024 {
@@ -275,8 +287,14 @@ fn main() -> ! {
                                 Command::Pwm { channel, pin: PwmPin::ISet, duty } if duty <= ad5680::MAX_VALUE => {
                                     channel_states[channel].pid_enabled = false;
                                     match channel {
-                                        0 => dac0.set(duty).unwrap(),
-                                        1 => dac1.set(duty).unwrap(),
+                                        0 => {
+                                            dac0.set(duty).unwrap();
+                                            shdn0.set_high().unwrap();
+                                        }
+                                        1 => {
+                                            dac1.set(duty).unwrap();
+                                            shdn1.set_high().unwrap();
+                                        }
                                         _ => unreachable!(),
                                     }
                                     channel_states[channel].dac_value = duty;
@@ -402,12 +420,13 @@ fn main() -> ! {
                 // Update watchdog
                 wd.feed();
 
-                // cortex_m::interrupt::free(|cs| {
-                //     if !net::is_pending(cs) {
-                //         // Wait for interrupts
-                //         wfi();
-                //     }
-                // });
+                cortex_m::interrupt::free(|cs| {
+                    if !net::is_pending(cs) {
+                        // Wait for interrupts
+                        // (Ethernet or SysTick)
+                        wfi();
+                    }
+                });
             }
         });
     });

src/pins.rs

@@ -1,4 +1,5 @@
 use stm32f4xx_hal::{
+    hal::digital::v2::OutputPin,
     gpio::{
         AF5, Alternate,
         gpioa::*,
@@ -30,8 +31,10 @@ pub struct Pins {
     pub pwm: PwmPins,
     pub dac0_spi: Dac0Spi,
     pub dac0_sync: PE4<Output<PushPull>>,
+    pub shdn0: PE10<Output<PushPull>>,
     pub dac1_spi: Dac1Spi,
     pub dac1_sync: PF6<Output<PushPull>>,
+    pub shdn1: PE15<Output<PushPull>>,
 }
 
 impl Pins {
@@ -58,15 +61,6 @@ impl Pins {
         let adc_spi = Self::setup_spi_adc(clocks, spi2, gpiob.pb10, gpiob.pb14, gpiob.pb15);
         let adc_nss = gpiob.pb12.into_push_pull_output();
 
-        let (dac0_spi, dac0_sync) = Self::setup_dac0(
-            clocks, spi4,
-            gpioe.pe2, gpioe.pe4, gpioe.pe6
-        );
-        let (dac1_spi, dac1_sync) = Self::setup_dac1(
-            clocks, spi5,
-            gpiof.pf7, gpiof.pf6, gpiof.pf9
-        );
-
         let pwm = PwmPins::setup(
             clocks, tim1, tim3,
             gpioc.pc6, gpioc.pc7,
@@ -74,11 +68,24 @@ impl Pins {
             gpioe.pe13, gpioe.pe14
         );
 
+        let (dac0_spi, dac0_sync) = Self::setup_dac0(
+            clocks, spi4,
+            gpioe.pe2, gpioe.pe4, gpioe.pe6
+        );
+        let mut shdn0 = gpioe.pe10.into_push_pull_output();
+        let _ = shdn0.set_low();
+        let (dac1_spi, dac1_sync) = Self::setup_dac1(
+            clocks, spi5,
+            gpiof.pf7, gpiof.pf6, gpiof.pf9
+        );
+        let mut shdn1 = gpioe.pe15.into_push_pull_output();
+        let _ = shdn1.set_low();
+
         Pins {
             adc_spi, adc_nss,
             pwm,
-            dac0_spi, dac0_sync,
-            dac1_spi, dac1_sync,
+            dac0_spi, dac0_sync, shdn0,
+            dac1_spi, dac1_sync, shdn1,
         }
     }