ad5680: keep sync high for 1ms
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cf03613ac5
commit
f9b55508dd
@ -6,6 +6,7 @@ use stm32f4xx_hal::{
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time::MegaHertz,
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spi,
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};
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use crate::timer::sleep;
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/// SPI Mode 1
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pub const SPI_MODE: spi::Mode = spi::Mode {
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@ -33,23 +34,23 @@ impl<SPI: Transfer<u8>, S: OutputPin> Dac<SPI, S> {
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}
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}
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fn write(&mut self, mut buf: [u8; 3]) -> Result<(), SPI::Error> {
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fn write(&mut self, buf: &mut [u8]) -> Result<(), SPI::Error> {
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// pulse sync to start a new transfer. leave sync idle low
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// afterwards to save power as recommended per datasheet.
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let _ = self.sync.set_high();
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cortex_m::asm::nop();
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// must be high for >= 33 ns
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sleep(1);
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let _ = self.sync.set_low();
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self.spi.transfer(&mut buf)?;
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self.spi.transfer(buf)?;
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Ok(())
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}
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pub fn set(&mut self, value: u32) -> Result<(), SPI::Error> {
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let buf = [
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let mut buf = [
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(value >> 14) as u8,
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(value >> 6) as u8,
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(value << 2) as u8,
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];
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self.write(buf)
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self.write(&mut buf)
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}
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}
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@ -89,6 +89,8 @@ fn main() -> ! {
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wd.start(WATCHDOG_INTERVAL.ms());
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wd.feed();
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timer::setup(cp.SYST, clocks);
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let pins = Pins::setup(
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clocks, dp.TIM1, dp.TIM3,
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dp.GPIOA, dp.GPIOB, dp.GPIOC, dp.GPIOE, dp.GPIOF, dp.GPIOG,
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@ -98,7 +100,6 @@ fn main() -> ! {
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let mut channels = Channels::new(pins);
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channels.calibrate_dac_value(0);
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timer::setup(cp.SYST, clocks);
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#[cfg(not(feature = "generate-hwaddr"))]
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let hwaddr = EthernetAddress(NET_HWADDR);
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@ -39,3 +39,10 @@ pub fn now() -> u32 {
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.deref()
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})
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}
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/// block for at least `amount` milliseconds
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fn sleep(amount: u32) {
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use crate::timer::now;
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let start = now();
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while now() - start <= amount {}
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}
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