ad7172: move setup from main

softspi
Astro 2020-03-12 00:44:15 +01:00
parent 44c8ff54c1
commit c377706e0e
2 changed files with 23 additions and 17 deletions

View File

@ -19,22 +19,26 @@ pub struct Adc<SPI: Transfer<u8>, NSS: OutputPin> {
}
impl<SPI: Transfer<u8, Error = E>, NSS: OutputPin, E: fmt::Debug> Adc<SPI, NSS> {
pub fn new(spi: SPI, mut nss: NSS) -> Result<Self, SPI::Error> {
pub fn new(spi: SPI, mut nss: NSS) -> Result<Self, AdcError<SPI::Error>> {
let _ = nss.set_high();
let mut adc = Adc {
spi, nss,
checksum_mode: ChecksumMode::Off,
};
adc.reset()?;
adc.set_checksum_mode(ChecksumMode::Crc).unwrap();
match adc.identify() {
Err(e) =>
warn!("Cannot identify ADC: {:?}", e),
Ok(id) if id & 0xFFF0 == 0x00D0 =>
info!("ADC id: {:04X}", id),
Ok(id) =>
info!("ADC id: {:04X} (corrupt)", id),
let mut retries = 0;
let mut adc_id;
loop {
adc_id = adc.identify()?;
if adc_id & 0xFFF0 == 0x00D0 {
break;
} else {
retries += 1;
}
}
info!("ADC id: {:04X} ({} retries)", adc_id, retries);
Ok(adc)
}

View File

@ -92,11 +92,8 @@ fn main() -> ! {
let pins = Pins::setup(clocks, dp.GPIOA, dp.GPIOB, dp.GPIOC, dp.GPIOG, dp.SPI2);
info!("ADC init");
let mut adc = ad7172::Adc::new(pins.adc_spi, pins.adc_nss).unwrap();
adc.set_checksum_mode(ad7172::ChecksumMode::Crc).unwrap();
info!("Timer setup");
timer::setup(cp.SYST, clocks);
#[cfg(not(feature = "generate-hwaddr"))]
@ -128,15 +125,20 @@ fn main() -> ! {
last_output = now;
}
if let Some(channel) = adc.data_ready().unwrap() {
let data = adc.read_data().unwrap();
info!("ADC {}: {:08X}", channel, data);
}
// Update watchdog
wd.feed();
cortex_m::interrupt::free(|cs| {
if !net::is_pending(cs) {
// Wait for interrupts
wfi();
}
});
// cortex_m::interrupt::free(|cs| {
// if !net::is_pending(cs) {
// // Wait for interrupts
// wfi();
// }
// });
}
});
});