From 7259caee47f29fa8bed1e01bd427ee9f3f3d7e9d Mon Sep 17 00:00:00 2001
From: atse <atse@m-labs.hk>
Date: Fri, 26 Jan 2024 15:01:09 +0800
Subject: [PATCH] Treat VREF as always 1.5V when getting tec_i

---
 src/channels.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/channels.rs b/src/channels.rs
index 5838731..f5799ec 100644
--- a/src/channels.rs
+++ b/src/channels.rs
@@ -372,7 +372,7 @@ impl Channels {
 
     // Get current passing through TEC
     pub fn get_tec_i(&mut self, channel: usize) -> ElectricCurrent {
-        (self.read_itec(channel) - self.read_vref(channel)) / ElectricalResistance::new::<ohm>(0.4)
+        (self.read_itec(channel) - ElectricPotential::new::<volt>(1.5)) / ElectricalResistance::new::<ohm>(0.4)
     }
 
     // Get voltage across TEC