diff --git a/Cargo.toml b/Cargo.toml
index ebca18f..174c9a8 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -22,8 +22,8 @@ cortex-m = "0.6"
 cortex-m-rt = { version = "0.6", features = ["device"] }
 cortex-m-log = { version = "0.5", features = ["log-integration"] }
 embedded-hal = "0.2"
-stm32f4xx-hal = { version = "0.7", features = ["rt", "stm32f429"] }
-stm32-eth = { version = "0.1.2", features = ["smoltcp-phy", "nucleo-f429zi"], path = "../../stm32f4/stm32-eth" }
+stm32f4xx-hal = { version = "0.7", features = ["rt", "stm32f427"] }
+stm32-eth = { version = "0.1.2", features = ["smoltcp-phy"], path = "../../stm32f4/stm32-eth" }
 smoltcp = { version = "0.6.0", default-features = false, features = ["proto-ipv4", "socket-tcp", "log"] }
 hash2hwaddr = { version = "0.0", optional = true }
 
diff --git a/src/main.rs b/src/main.rs
index 066abe3..0643c67 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -25,6 +25,7 @@ use smoltcp::{
     wire::EthernetAddress,
 };
 
+mod pins;
 mod adc_input;
 use adc_input::AdcInput;
 mod net;
@@ -100,9 +101,10 @@ fn main() -> ! {
     let mut adc_input = AdcInput::new(dp.ADC1, gpioa.pa3);
 
     info!("Eth setup");
-    stm32_eth::setup_pins(
-        gpioa.pa1, gpioa.pa2, gpioa.pa7, gpiob.pb13, gpioc.pc1,
-        gpioc.pc4, gpioc.pc5, gpiog.pg11, gpiog.pg13
+    pins::setup_ethernet(
+        gpioa.pa1, gpioa.pa2, gpioc.pc1, gpioa.pa7,
+        gpioc.pc4, gpioc.pc5, gpiob.pb11, gpiog.pg13,
+        gpiob.pb13
     );
 
     info!("Timer setup");
diff --git a/src/pins.rs b/src/pins.rs
new file mode 100644
index 0000000..5c6ebc3
--- /dev/null
+++ b/src/pins.rs
@@ -0,0 +1,32 @@
+use stm32f4xx_hal::gpio::{
+    gpioa::{PA1, PA2, PA7},
+    gpiob::{PB11, PB13},
+    gpioc::{PC1, PC4, PC5},
+    gpiog::{PG13},
+    Speed::VeryHigh,
+};
+
+pub fn setup_ethernet<M1, M2, M3, M4, M5, M6, M7, M8, M9>(
+    pa1: PA1<M1>, pa2: PA2<M2>, pc1: PC1<M3>, pa7: PA7<M4>,
+    pc4: PC4<M5>, pc5: PC5<M6>, pb11: PB11<M7>, pg13: PG13<M8>,
+    pb13: PB13<M9>
+) {
+    // PA1 RMII Reference Clock - SB13 ON
+    pa1.into_alternate_af11().set_speed(VeryHigh);
+    // PA2 RMII MDIO - SB160 ON
+    pa2.into_alternate_af11().set_speed(VeryHigh);
+    // PC1 RMII MDC - SB164 ON
+    pc1.into_alternate_af11().set_speed(VeryHigh);
+    // PA7 RMII RX Data Valid D11 JP6 ON
+    pa7.into_alternate_af11().set_speed(VeryHigh);
+    // PC4 RMII RXD0 - SB178 ON
+    pc4.into_alternate_af11().set_speed(VeryHigh);
+    // PC5 RMII RXD1 - SB181 ON
+    pc5.into_alternate_af11().set_speed(VeryHigh);
+    // PB11 RMII TX Enable - SB183 ON
+    pb11.into_alternate_af11().set_speed(VeryHigh);
+    // PG13 RXII TXD0 - SB182 ON
+    pg13.into_alternate_af11().set_speed(VeryHigh);
+    // PB13 RMII TXD1 I2S_A_CK JP7 ON
+    pb13.into_alternate_af11().set_speed(VeryHigh);
+}