implement mac address generation with reading eui48 from i2c eeprom
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a84242fb1f
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201701ee8b
19
Cargo.lock
generated
19
Cargo.lock
generated
@ -127,6 +127,15 @@ dependencies = [
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"cortex-m",
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]
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[[package]]
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name = "eeprom24x"
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version = "0.3.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "f680e8d81a559a97de04c5fab25f17f22a55770120c868ef8fbdea6398d44107"
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dependencies = [
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"embedded-hal",
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]
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[[package]]
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name = "embedded-dma"
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version = "0.1.1"
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@ -164,12 +173,6 @@ dependencies = [
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"typenum",
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]
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[[package]]
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name = "hash2hwaddr"
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version = "0.0.1"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "857afb5ee9e767c3a73b2ad7212b6deea0c3761a27db1e20ea0ed57ee352cfef"
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[[package]]
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name = "libm"
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version = "0.2.1"
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@ -305,6 +308,8 @@ checksum = "388a1df253eca08550bef6c72392cfe7c30914bf41df5269b68cbd6ff8f570a3"
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[[package]]
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name = "smoltcp"
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version = "0.6.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "0fe46639fd2ec79eadf8fe719f237a7a0bd4dac5d957f1ca5bbdbc1c3c39e53a"
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dependencies = [
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"bitflags",
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"byteorder",
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@ -392,7 +397,7 @@ dependencies = [
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"cortex-m",
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"cortex-m-log",
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"cortex-m-rt",
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"hash2hwaddr",
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"eeprom24x",
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"log",
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"nb 0.1.3",
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"nom",
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@ -24,7 +24,6 @@ cortex-m-log = { version = "0.6", features = ["log-integration"] }
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stm32f4xx-hal = { version = "0.8", features = ["rt", "stm32f427", "usb_fs"] }
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stm32-eth = { version = "0.2", features = ["stm32f427", "smoltcp-phy"], git = "https://github.com/stm32-rs/stm32-eth.git" }
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smoltcp = { version = "0.6.0", default-features = false, features = ["proto-ipv4", "socket-tcp", "log"] }
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hash2hwaddr = { version = "0.0", optional = true }
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bit_field = "0.10"
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byteorder = { version = "1", default-features = false }
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nom = { version = "5", default-features = false }
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@ -33,6 +32,7 @@ usb-device = "0.2"
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usbd-serial = "0.1"
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nb = "0.1"
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uom = { version = "0.29", default-features = false, features = ["autoconvert", "si", "f64"] }
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eeprom24x = "0.3"
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[patch.crates-io]
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stm32f4xx-hal = { git = "https://github.com/stm32-rs/stm32f4xx-hal.git" }
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@ -40,8 +40,6 @@ stm32f4xx-hal = { git = "https://github.com/stm32-rs/stm32f4xx-hal.git" }
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[features]
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semihosting = ["panic-semihosting", "cortex-m-log/semihosting"]
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generate-hwaddr = ["hash2hwaddr"]
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default = ["generate-hwaddr"]
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[profile.release]
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codegen-units = 1
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@ -1 +1 @@
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"0wa1xknnmmax278pwvcj134g62y00mr7k54cmvis64y27qlbg64h"
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"0gjm2xp4shfjxhxcnildifrglw5v1g33c7a566cq97bdw19f4gj8"
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18
src/main.rs
18
src/main.rs
@ -71,8 +71,6 @@ const WATCHDOG_INTERVAL: u32 = 1_000;
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#[cfg(feature = "semihosting")]
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const WATCHDOG_INTERVAL: u32 = 30_000;
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#[cfg(not(feature = "generate-hwaddr"))]
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const NET_HWADDR: [u8; 6] = [0x02, 0x00, 0xDE, 0xAD, 0xBE, 0xEF];
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const TCP_PORT: u16 = 23;
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@ -103,9 +101,10 @@ fn main() -> ! {
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timer::setup(cp.SYST, clocks);
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let (pins, mut leds, eth_pins, usb) = Pins::setup(
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let (pins, mut leds, mut eeprom, eth_pins, usb) = Pins::setup(
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clocks, dp.TIM1, dp.TIM3,
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dp.GPIOA, dp.GPIOB, dp.GPIOC, dp.GPIOD, dp.GPIOE, dp.GPIOF, dp.GPIOG,
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dp.I2C1,
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dp.SPI2, dp.SPI4, dp.SPI5,
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dp.ADC1,
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dp.OTG_FS_GLOBAL,
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@ -121,14 +120,11 @@ fn main() -> ! {
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let mut channels = Channels::new(pins);
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#[cfg(not(feature = "generate-hwaddr"))]
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let hwaddr = EthernetAddress(NET_HWADDR);
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#[cfg(feature = "generate-hwaddr")]
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let hwaddr = {
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let uid = stm32f4xx_hal::signature::Uid::get();
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EthernetAddress(hash2hwaddr::generate_hwaddr(uid))
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};
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info!("Net hwaddr: {}", hwaddr);
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// EEPROM ships with a read-only EUI-48 identifier
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let mut eui48 = [0; 6];
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eeprom.read_data(0xFA, &mut eui48).unwrap();
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let hwaddr = EthernetAddress(eui48);
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info!("EEPROM MAC address: {}", hwaddr);
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net::run(clocks, dp.ETHERNET_MAC, dp.ETHERNET_DMA, eth_pins, hwaddr, |iface| {
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Server::<Session>::run(iface, |server| {
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25
src/pins.rs
25
src/pins.rs
@ -1,8 +1,7 @@
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use stm32f4xx_hal::{
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adc::Adc,
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hal::{self, blocking::spi::Transfer, digital::v2::OutputPin},
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gpio::{
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AF5, Alternate, Analog, Floating, Input,
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AF5, Alternate, AlternateOD, Analog, Floating, Input,
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gpioa::*,
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gpiob::*,
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gpioc::*,
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@ -12,6 +11,8 @@ use stm32f4xx_hal::{
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GpioExt,
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Output, PushPull,
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},
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hal::{self, blocking::spi::Transfer, digital::v2::OutputPin},
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i2c::I2c,
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otg_fs::USB,
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rcc::Clocks,
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pwm::{self, PwmChannels},
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@ -19,18 +20,28 @@ use stm32f4xx_hal::{
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stm32::{
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ADC1,
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GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG,
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I2C1,
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OTG_FS_GLOBAL, OTG_FS_DEVICE, OTG_FS_PWRCLK,
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SPI2, SPI4, SPI5,
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TIM1, TIM3,
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},
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time::U32Ext,
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};
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use eeprom24x::{self, Eeprom24x};
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use stm32_eth::EthPins;
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use crate::{
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channel::{Channel0, Channel1},
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leds::Leds,
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};
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pub type Eeprom = Eeprom24x<
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I2c<I2C1, (
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PB8<AlternateOD<stm32f4xx_hal::gpio::AF4>>,
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PB9<AlternateOD<stm32f4xx_hal::gpio::AF4>>
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)>,
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eeprom24x::page_size::B8,
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eeprom24x::addr_size::OneByte
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>;
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pub type EthernetPins = EthPins<
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PA1<Input<Floating>>,
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@ -106,10 +117,11 @@ impl Pins {
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clocks: Clocks,
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tim1: TIM1, tim3: TIM3,
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gpioa: GPIOA, gpiob: GPIOB, gpioc: GPIOC, gpiod: GPIOD, gpioe: GPIOE, gpiof: GPIOF, gpiog: GPIOG,
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i2c1: I2C1,
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spi2: SPI2, spi4: SPI4, spi5: SPI5,
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adc1: ADC1,
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otg_fs_global: OTG_FS_GLOBAL, otg_fs_device: OTG_FS_DEVICE, otg_fs_pwrclk: OTG_FS_PWRCLK,
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) -> (Self, Leds, EthernetPins, USB) {
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) -> (Self, Leds, Eeprom, EthernetPins, USB) {
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let gpioa = gpioa.split();
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let gpiob = gpiob.split();
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let gpioc = gpioc.split();
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@ -180,6 +192,11 @@ impl Pins {
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let leds = Leds::new(gpiod.pd9, gpiod.pd10.into_push_pull_output(), gpiod.pd11.into_push_pull_output());
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let eeprom_scl = gpiob.pb8.into_alternate_af4().set_open_drain();
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let eeprom_sda = gpiob.pb9.into_alternate_af4().set_open_drain();
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let eeprom_i2c = I2c::i2c1(i2c1, (eeprom_scl, eeprom_sda), 400.khz(), clocks);
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let eeprom = Eeprom24x::new_24x02(eeprom_i2c, eeprom24x::SlaveAddr::default());
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let eth_pins = EthPins {
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ref_clk: gpioa.pa1,
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md_io: gpioa.pa2,
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@ -201,7 +218,7 @@ impl Pins {
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hclk: clocks.hclk(),
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};
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(pins, leds, eth_pins, usb)
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(pins, leds, eeprom, eth_pins, usb)
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}
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/// Configure the GPIO pins for SPI operation, and initialize SPI
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