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implement mac address generation with reading eui48 from i2c eeprom

pull/20/head
Astro 2020-09-24 00:16:40 +02:00
parent a84242fb1f
commit 201701ee8b
5 changed files with 42 additions and 26 deletions
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19
Cargo.lock generated
View File

@ -127,6 +127,15 @@ dependencies = [
"cortex-m",
]
[[package]]
name = "eeprom24x"
version = "0.3.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "f680e8d81a559a97de04c5fab25f17f22a55770120c868ef8fbdea6398d44107"
dependencies = [
"embedded-hal",
]
[[package]]
name = "embedded-dma"
version = "0.1.1"
@ -164,12 +173,6 @@ dependencies = [
"typenum",
]
[[package]]
name = "hash2hwaddr"
version = "0.0.1"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "857afb5ee9e767c3a73b2ad7212b6deea0c3761a27db1e20ea0ed57ee352cfef"
[[package]]
name = "libm"
version = "0.2.1"
@ -305,6 +308,8 @@ checksum = "388a1df253eca08550bef6c72392cfe7c30914bf41df5269b68cbd6ff8f570a3"
[[package]]
name = "smoltcp"
version = "0.6.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "0fe46639fd2ec79eadf8fe719f237a7a0bd4dac5d957f1ca5bbdbc1c3c39e53a"
dependencies = [
"bitflags",
"byteorder",
@ -392,7 +397,7 @@ dependencies = [
"cortex-m",
"cortex-m-log",
"cortex-m-rt",
"hash2hwaddr",
"eeprom24x",
"log",
"nb 0.1.3",
"nom",

4
Cargo.toml
View File

@ -24,7 +24,6 @@ cortex-m-log = { version = "0.6", features = ["log-integration"] }
stm32f4xx-hal = { version = "0.8", features = ["rt", "stm32f427", "usb_fs"] }
stm32-eth = { version = "0.2", features = ["stm32f427", "smoltcp-phy"], git = "https://github.com/stm32-rs/stm32-eth.git" }
smoltcp = { version = "0.6.0", default-features = false, features = ["proto-ipv4", "socket-tcp", "log"] }
hash2hwaddr = { version = "0.0", optional = true }
bit_field = "0.10"
byteorder = { version = "1", default-features = false }
nom = { version = "5", default-features = false }
@ -33,6 +32,7 @@ usb-device = "0.2"
usbd-serial = "0.1"
nb = "0.1"
uom = { version = "0.29", default-features = false, features = ["autoconvert", "si", "f64"] }
eeprom24x = "0.3"
[patch.crates-io]
stm32f4xx-hal = { git = "https://github.com/stm32-rs/stm32f4xx-hal.git" }
@ -40,8 +40,6 @@ stm32f4xx-hal = { git = "https://github.com/stm32-rs/stm32f4xx-hal.git" }
[features]
semihosting = ["panic-semihosting", "cortex-m-log/semihosting"]
generate-hwaddr = ["hash2hwaddr"]
default = ["generate-hwaddr"]
[profile.release]
codegen-units = 1

2
cargosha256.nix
View File

@ -1 +1 @@
"0wa1xknnmmax278pwvcj134g62y00mr7k54cmvis64y27qlbg64h"
"0gjm2xp4shfjxhxcnildifrglw5v1g33c7a566cq97bdw19f4gj8"

18
src/main.rs
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@ -71,8 +71,6 @@ const WATCHDOG_INTERVAL: u32 = 1_000;
#[cfg(feature = "semihosting")]
const WATCHDOG_INTERVAL: u32 = 30_000;
#[cfg(not(feature = "generate-hwaddr"))]
const NET_HWADDR: [u8; 6] = [0x02, 0x00, 0xDE, 0xAD, 0xBE, 0xEF];
const TCP_PORT: u16 = 23;
@ -103,9 +101,10 @@ fn main() -> ! {
timer::setup(cp.SYST, clocks);
let (pins, mut leds, eth_pins, usb) = Pins::setup(
let (pins, mut leds, mut eeprom, eth_pins, usb) = Pins::setup(
clocks, dp.TIM1, dp.TIM3,
dp.GPIOA, dp.GPIOB, dp.GPIOC, dp.GPIOD, dp.GPIOE, dp.GPIOF, dp.GPIOG,
dp.I2C1,
dp.SPI2, dp.SPI4, dp.SPI5,
dp.ADC1,
dp.OTG_FS_GLOBAL,
@ -121,14 +120,11 @@ fn main() -> ! {
let mut channels = Channels::new(pins);
#[cfg(not(feature = "generate-hwaddr"))]
let hwaddr = EthernetAddress(NET_HWADDR);
#[cfg(feature = "generate-hwaddr")]
let hwaddr = {
let uid = stm32f4xx_hal::signature::Uid::get();
EthernetAddress(hash2hwaddr::generate_hwaddr(uid))
};
info!("Net hwaddr: {}", hwaddr);
// EEPROM ships with a read-only EUI-48 identifier
let mut eui48 = [0; 6];
eeprom.read_data(0xFA, &mut eui48).unwrap();
let hwaddr = EthernetAddress(eui48);
info!("EEPROM MAC address: {}", hwaddr);
net::run(clocks, dp.ETHERNET_MAC, dp.ETHERNET_DMA, eth_pins, hwaddr, |iface| {
Server::<Session>::run(iface, |server| {

25
src/pins.rs
View File

@ -1,8 +1,7 @@
use stm32f4xx_hal::{
adc::Adc,
hal::{self, blocking::spi::Transfer, digital::v2::OutputPin},
gpio::{
AF5, Alternate, Analog, Floating, Input,
AF5, Alternate, AlternateOD, Analog, Floating, Input,
gpioa::*,
gpiob::*,
gpioc::*,
@ -12,6 +11,8 @@ use stm32f4xx_hal::{
GpioExt,
Output, PushPull,
},
hal::{self, blocking::spi::Transfer, digital::v2::OutputPin},
i2c::I2c,
otg_fs::USB,
rcc::Clocks,
pwm::{self, PwmChannels},
@ -19,18 +20,28 @@ use stm32f4xx_hal::{
stm32::{
ADC1,
GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG,
I2C1,
OTG_FS_GLOBAL, OTG_FS_DEVICE, OTG_FS_PWRCLK,
SPI2, SPI4, SPI5,
TIM1, TIM3,
},
time::U32Ext,
};
use eeprom24x::{self, Eeprom24x};
use stm32_eth::EthPins;
use crate::{
channel::{Channel0, Channel1},
leds::Leds,
};
pub type Eeprom = Eeprom24x<
I2c<I2C1, (
PB8<AlternateOD<stm32f4xx_hal::gpio::AF4>>,
PB9<AlternateOD<stm32f4xx_hal::gpio::AF4>>
)>,
eeprom24x::page_size::B8,
eeprom24x::addr_size::OneByte
>;
pub type EthernetPins = EthPins<
PA1<Input<Floating>>,
@ -106,10 +117,11 @@ impl Pins {
clocks: Clocks,
tim1: TIM1, tim3: TIM3,
gpioa: GPIOA, gpiob: GPIOB, gpioc: GPIOC, gpiod: GPIOD, gpioe: GPIOE, gpiof: GPIOF, gpiog: GPIOG,
i2c1: I2C1,
spi2: SPI2, spi4: SPI4, spi5: SPI5,
adc1: ADC1,
otg_fs_global: OTG_FS_GLOBAL, otg_fs_device: OTG_FS_DEVICE, otg_fs_pwrclk: OTG_FS_PWRCLK,
) -> (Self, Leds, EthernetPins, USB) {
) -> (Self, Leds, Eeprom, EthernetPins, USB) {
let gpioa = gpioa.split();
let gpiob = gpiob.split();
let gpioc = gpioc.split();
@ -180,6 +192,11 @@ impl Pins {
let leds = Leds::new(gpiod.pd9, gpiod.pd10.into_push_pull_output(), gpiod.pd11.into_push_pull_output());
let eeprom_scl = gpiob.pb8.into_alternate_af4().set_open_drain();
let eeprom_sda = gpiob.pb9.into_alternate_af4().set_open_drain();
let eeprom_i2c = I2c::i2c1(i2c1, (eeprom_scl, eeprom_sda), 400.khz(), clocks);
let eeprom = Eeprom24x::new_24x02(eeprom_i2c, eeprom24x::SlaveAddr::default());
let eth_pins = EthPins {
ref_clk: gpioa.pa1,
md_io: gpioa.pa2,
@ -201,7 +218,7 @@ impl Pins {
hclk: clocks.hclk(),
};
(pins, leds, eth_pins, usb)
(pins, leds, eeprom, eth_pins, usb)
}
/// Configure the GPIO pins for SPI operation, and initialize SPI