add ad5680
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fed3e767e9
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50
src/ad5680.rs
Normal file
50
src/ad5680.rs
Normal file
@ -0,0 +1,50 @@
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use embedded_hal::{
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blocking::spi::Transfer,
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digital::v2::OutputPin,
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};
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use stm32f4xx_hal::{
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time::MegaHertz,
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spi,
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};
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pub const SPI_MODE: spi::Mode = spi::Mode {
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polarity: spi::Polarity::IdleHigh,
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phase: spi::Phase::CaptureOnFirstTransition,
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};
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/// 30 MHz
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pub const SPI_CLOCK: MegaHertz = MegaHertz(30);
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/// [AD5680](https://www.analog.com/media/en/technical-documentation/data-sheets/AD5680.pdf) DAC
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pub struct Dac<SPI: Transfer<u8>, S: OutputPin> {
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spi: SPI,
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sync: S,
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}
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impl<SPI: Transfer<u8>, S: OutputPin> Dac<SPI, S> {
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pub fn new(spi: SPI, mut sync: S) -> Self {
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let _ = sync.set_high();
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Dac {
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spi,
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sync,
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}
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}
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fn write(&mut self, mut buf: [u8; 3]) -> Result<(), SPI::Error> {
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let _ = self.sync.set_low();
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let result = self.spi.transfer(&mut buf);
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let _ = self.sync.set_high();
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result.map(|_| ())
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}
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/// value: `0..0x20_000`
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pub fn set(&mut self, value: u32) -> Result<(), SPI::Error> {
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let buf = [
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(value >> 14) as u8,
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(value >> 6) as u8,
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(value << 2) as u8,
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];
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self.write(buf)
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}
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}
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@ -29,6 +29,7 @@ use init_log::init_log;
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mod pins;
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mod pins;
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use pins::Pins;
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use pins::Pins;
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mod ad7172;
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mod ad7172;
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mod ad5680;
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mod net;
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mod net;
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mod server;
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mod server;
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use server::Server;
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use server::Server;
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@ -85,6 +86,10 @@ fn main() -> ! {
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);
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);
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let mut adc = ad7172::Adc::new(pins.adc_spi, pins.adc_nss).unwrap();
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let mut adc = ad7172::Adc::new(pins.adc_spi, pins.adc_nss).unwrap();
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let mut dac0 = ad5680::Dac::new(pins.dac0_spi, pins.dac0_sync);
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dac0.set(0);
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let mut dac1 = ad5680::Dac::new(pins.dac1_spi, pins.dac1_sync);
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dac1.set(0);
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timer::setup(cp.SYST, clocks);
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timer::setup(cp.SYST, clocks);
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16
src/pins.rs
16
src/pins.rs
@ -28,8 +28,6 @@ type AdcSpi = Spi<SPI2, (PB10<Alternate<AF5>>, PB14<Alternate<AF5>>, PB15<Altern
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type Dac0Spi = Spi<SPI4, (PE2<Alternate<AF5>>, NoMiso, PE6<Alternate<AF5>>)>;
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type Dac0Spi = Spi<SPI4, (PE2<Alternate<AF5>>, NoMiso, PE6<Alternate<AF5>>)>;
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type Dac1Spi = Spi<SPI5, (PF7<Alternate<AF5>>, NoMiso, PF9<Alternate<AF5>>)>;
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type Dac1Spi = Spi<SPI5, (PF7<Alternate<AF5>>, NoMiso, PF9<Alternate<AF5>>)>;
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const DAC_FREQ: MegaHertz = MegaHertz(30);
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pub struct Pins {
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pub struct Pins {
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pub adc_spi: AdcSpi,
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pub adc_spi: AdcSpi,
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pub adc_nss: PB12<Output<PushPull>>,
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pub adc_nss: PB12<Output<PushPull>>,
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@ -118,11 +116,8 @@ impl Pins {
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let spi = Spi::spi4(
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let spi = Spi::spi4(
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spi4,
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spi4,
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(sclk, NoMiso, sdin),
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(sclk, NoMiso, sdin),
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spi::Mode {
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crate::ad5680::SPI_MODE,
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polarity: spi::Polarity::IdleHigh,
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crate::ad5680::SPI_CLOCK.into(),
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phase: spi::Phase::CaptureOnSecondTransition,
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},
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DAC_FREQ.into(),
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clocks
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clocks
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);
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);
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let sync = sync.into_push_pull_output();
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let sync = sync.into_push_pull_output();
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@ -139,11 +134,8 @@ impl Pins {
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let spi = Spi::spi5(
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let spi = Spi::spi5(
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spi5,
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spi5,
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(sclk, NoMiso, sdin),
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(sclk, NoMiso, sdin),
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spi::Mode {
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crate::ad5680::SPI_MODE,
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polarity: spi::Polarity::IdleHigh,
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crate::ad5680::SPI_CLOCK.into(),
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phase: spi::Phase::CaptureOnSecondTransition,
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},
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DAC_FREQ.into(),
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clocks
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clocks
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);
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);
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let sync = sync.into_push_pull_output();
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let sync = sync.into_push_pull_output();
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