add ad5680

This commit is contained in:
Astro 2020-03-12 21:27:03 +01:00
parent fed3e767e9
commit 09dbb7d495
3 changed files with 59 additions and 12 deletions

50
src/ad5680.rs Normal file
View File

@ -0,0 +1,50 @@
use embedded_hal::{
blocking::spi::Transfer,
digital::v2::OutputPin,
};
use stm32f4xx_hal::{
time::MegaHertz,
spi,
};
pub const SPI_MODE: spi::Mode = spi::Mode {
polarity: spi::Polarity::IdleHigh,
phase: spi::Phase::CaptureOnFirstTransition,
};
/// 30 MHz
pub const SPI_CLOCK: MegaHertz = MegaHertz(30);
/// [AD5680](https://www.analog.com/media/en/technical-documentation/data-sheets/AD5680.pdf) DAC
pub struct Dac<SPI: Transfer<u8>, S: OutputPin> {
spi: SPI,
sync: S,
}
impl<SPI: Transfer<u8>, S: OutputPin> Dac<SPI, S> {
pub fn new(spi: SPI, mut sync: S) -> Self {
let _ = sync.set_high();
Dac {
spi,
sync,
}
}
fn write(&mut self, mut buf: [u8; 3]) -> Result<(), SPI::Error> {
let _ = self.sync.set_low();
let result = self.spi.transfer(&mut buf);
let _ = self.sync.set_high();
result.map(|_| ())
}
/// value: `0..0x20_000`
pub fn set(&mut self, value: u32) -> Result<(), SPI::Error> {
let buf = [
(value >> 14) as u8,
(value >> 6) as u8,
(value << 2) as u8,
];
self.write(buf)
}
}

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@ -29,6 +29,7 @@ use init_log::init_log;
mod pins; mod pins;
use pins::Pins; use pins::Pins;
mod ad7172; mod ad7172;
mod ad5680;
mod net; mod net;
mod server; mod server;
use server::Server; use server::Server;
@ -85,6 +86,10 @@ fn main() -> ! {
); );
let mut adc = ad7172::Adc::new(pins.adc_spi, pins.adc_nss).unwrap(); let mut adc = ad7172::Adc::new(pins.adc_spi, pins.adc_nss).unwrap();
let mut dac0 = ad5680::Dac::new(pins.dac0_spi, pins.dac0_sync);
dac0.set(0);
let mut dac1 = ad5680::Dac::new(pins.dac1_spi, pins.dac1_sync);
dac1.set(0);
timer::setup(cp.SYST, clocks); timer::setup(cp.SYST, clocks);

View File

@ -28,8 +28,6 @@ type AdcSpi = Spi<SPI2, (PB10<Alternate<AF5>>, PB14<Alternate<AF5>>, PB15<Altern
type Dac0Spi = Spi<SPI4, (PE2<Alternate<AF5>>, NoMiso, PE6<Alternate<AF5>>)>; type Dac0Spi = Spi<SPI4, (PE2<Alternate<AF5>>, NoMiso, PE6<Alternate<AF5>>)>;
type Dac1Spi = Spi<SPI5, (PF7<Alternate<AF5>>, NoMiso, PF9<Alternate<AF5>>)>; type Dac1Spi = Spi<SPI5, (PF7<Alternate<AF5>>, NoMiso, PF9<Alternate<AF5>>)>;
const DAC_FREQ: MegaHertz = MegaHertz(30);
pub struct Pins { pub struct Pins {
pub adc_spi: AdcSpi, pub adc_spi: AdcSpi,
pub adc_nss: PB12<Output<PushPull>>, pub adc_nss: PB12<Output<PushPull>>,
@ -118,11 +116,8 @@ impl Pins {
let spi = Spi::spi4( let spi = Spi::spi4(
spi4, spi4,
(sclk, NoMiso, sdin), (sclk, NoMiso, sdin),
spi::Mode { crate::ad5680::SPI_MODE,
polarity: spi::Polarity::IdleHigh, crate::ad5680::SPI_CLOCK.into(),
phase: spi::Phase::CaptureOnSecondTransition,
},
DAC_FREQ.into(),
clocks clocks
); );
let sync = sync.into_push_pull_output(); let sync = sync.into_push_pull_output();
@ -139,11 +134,8 @@ impl Pins {
let spi = Spi::spi5( let spi = Spi::spi5(
spi5, spi5,
(sclk, NoMiso, sdin), (sclk, NoMiso, sdin),
spi::Mode { crate::ad5680::SPI_MODE,
polarity: spi::Polarity::IdleHigh, crate::ad5680::SPI_CLOCK.into(),
phase: spi::Phase::CaptureOnSecondTransition,
},
DAC_FREQ.into(),
clocks clocks
); );
let sync = sync.into_push_pull_output(); let sync = sync.into_push_pull_output();