From a3c971f006280959805890abcb7575b54fbfb964 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Robert=20J=C3=B6rdens?= <rj@quartiq.de>
Date: Thu, 1 Aug 2019 16:14:46 +0000
Subject: [PATCH] npl1, npl2: add

---
 npl1.json | 51 +++++++++++++++++++++++++++++++++++++++++++++++++++
 npl2.json | 44 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 95 insertions(+)
 create mode 100644 npl1.json
 create mode 100644 npl2.json

diff --git a/npl1.json b/npl1.json
new file mode 100644
index 0000000..4ea866a
--- /dev/null
+++ b/npl1.json
@@ -0,0 +1,51 @@
+{
+    "target": "kasli",
+    "variant": "npl1",
+    "hw_rev": "v1.1",
+    "base": "standalone",
+    "core_addr": "10.0.16.139",
+    "ext_ref_frequency": 100e6,
+    "peripherals": [
+        {
+            "type": "dio",
+            "ports": [0],
+            "bank_direction_low": "input",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "dio",
+            "ports": [1],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "sampler",
+            "ports": [3, 4]
+        },
+        {
+            "type": "sampler",
+            "ports": [5, 6]
+        },
+        {
+            "type": "urukul",
+            "ports": [7, 8],
+            "dds": "ad9912",
+            "clk_sel": 1,
+            "refclk": 100e6,
+            "pll_n": 10
+
+        },
+        {
+            "type": "urukul",
+            "ports": [9, 10],
+            "dds": "ad9912",
+            "clk_sel": 1,
+            "refclk": 100e6,
+            "pll_n": 10
+        },
+        {
+            "type": "zotino",
+            "ports": [11]
+        }
+   ]
+}
diff --git a/npl2.json b/npl2.json
new file mode 100644
index 0000000..051c81b
--- /dev/null
+++ b/npl2.json
@@ -0,0 +1,44 @@
+{
+    "target": "kasli",
+    "variant": "npl2",
+    "hw_rev": "v1.1",
+    "base": "standalone",
+    "core_addr": "10.0.16.138",
+    "ext_ref_frequency": 100e6,
+    "peripherals": [
+        {
+            "type": "dio",
+            "ports": [0],
+            "bank_direction_low": "input",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "dio",
+            "ports": [1],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "dio",
+            "ports": [2],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "sampler",
+            "ports": [3, 4]
+        },
+        {
+            "type": "urukul",
+            "ports": [7, 8],
+            "dds": "ad9912",
+            "clk_sel": 1,
+            "refclk": 100e6,
+            "pll_n": 10
+        },
+        {
+            "type": "zotino",
+            "ports": [11]
+        }
+   ]
+}