From 7173b85bcf65b47605241494267b9fbde60f7763 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Robert=20J=C3=B6rdens?= <rj@quartiq.de>
Date: Wed, 8 May 2019 16:03:08 +0000
Subject: [PATCH] add vlbaimaster, vlbaisatellite

---
 vlbaimaster.json    | 44 ++++++++++++++++++++++++++++++++++++++++++++
 vlbaisatellite.json | 44 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 88 insertions(+)
 create mode 100644 vlbaimaster.json
 create mode 100644 vlbaisatellite.json

diff --git a/vlbaimaster.json b/vlbaimaster.json
new file mode 100644
index 0000000..26a204e
--- /dev/null
+++ b/vlbaimaster.json
@@ -0,0 +1,44 @@
+{
+    "target": "kasli",
+    "variant": "vlbaimaster",
+    "hw_rev": "v1.1",
+    "base": "master",
+    "peripherals": [
+        {
+            "type": "dio",
+            "ports": [0],
+            "bank_direction_low": "input",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "dio",
+            "ports": [1],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "dio",
+            "ports": [2],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "sampler",
+            "ports": [3]
+        },
+        {
+            "type": "urukul",
+            "ports": [5, 4],
+            "clk_sel": 0
+        },
+        {
+            "type": "urukul",
+            "ports": [6],
+            "clk_sel": 0
+        },
+        {
+            "type": "zotino",
+            "ports": [7]
+        }
+    ]
+}
diff --git a/vlbaisatellite.json b/vlbaisatellite.json
new file mode 100644
index 0000000..f92c644
--- /dev/null
+++ b/vlbaisatellite.json
@@ -0,0 +1,44 @@
+{
+    "target": "kasli",
+    "variant": "vlbaisatellite",
+    "hw_rev": "v1.1",
+    "base": "satellite",
+    "peripherals": [
+        {
+            "type": "dio",
+            "ports": [0],
+            "bank_direction_low": "input",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "dio",
+            "ports": [1],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "dio",
+            "ports": [2],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "sampler",
+            "ports": [3]
+        },
+        {
+            "type": "urukul",
+            "ports": [5, 4],
+            "clk_sel": 0
+        },
+        {
+            "type": "urukul",
+            "ports": [6],
+            "clk_sel": 0
+        },
+        {
+            "type": "zotino",
+            "ports": [7]
+        }
+    ]
+}