ucsb: add edge counter, make TTLs bidirectional

master
Sebastien Bourdeauducq 2021-02-26 11:41:59 +08:00
parent e388254099
commit 52141a3fef
1 changed files with 2 additions and 1 deletions

View File

@ -10,7 +10,8 @@
"type": "dio",
"ports": [0],
"bank_direction_low": "input",
"bank_direction_high": "output"
"bank_direction_high": "input",
"edge_counter": true
},
{
"type": "urukul",