From 1932a76a7d4c21fc4509f04f51f8985047433b60 Mon Sep 17 00:00:00 2001
From: kai <kl@m-labs.hk>
Date: Tue, 13 Jul 2021 17:30:36 +0800
Subject: [PATCH] add duke6

---
 duke6.json | 71 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 71 insertions(+)
 create mode 100644 duke6.json

diff --git a/duke6.json b/duke6.json
new file mode 100644
index 0000000..99b8bb4
--- /dev/null
+++ b/duke6.json
@@ -0,0 +1,71 @@
+{
+    "target": "kasli",
+    "min_artiq_version": "6.0",
+    "variant": "duke6",
+    "hw_rev": "v2.0",
+    "base": "standalone",
+    "core_addr": "192.168.1.75",
+    "peripherals": [
+        {
+            "type": "dio",
+            "board": "DIO_SMA",
+            "ports": [0],
+            "bank_direction_low": "input",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "dio",
+            "board": "DIO_SMA",
+            "ports": [1],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "dio",
+            "board": "DIO_SMA",
+            "ports": [2],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "dio",
+            "board": "DIO_SMA",
+            "ports": [3],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "dio",
+            "board": "DIO_SMA",
+            "ports": [4],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "urukul",
+            "dds": "ad9910",
+            "ports": [5, 6],
+            "clk_sel": 2
+        },
+        {
+            "type": "urukul",
+            "dds": "ad9912",
+            "ports": [7, 8],
+            "clk_sel": 2
+        },
+        {
+            "type": "dio",
+            "board": "DIO_RJ45",
+            "ports": [9],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        },
+        {
+            "type": "dio",
+            "board": "DIO_RJ45",
+            "ports": [10],
+            "bank_direction_low": "output",
+            "bank_direction_high": "output"
+        }
+    ]
+}
\ No newline at end of file