2020-11-16 16:38:20 +08:00
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{
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"_description": "PTB 4.43 with backplane adapter and 4 Urukuls",
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"target": "kasli",
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"variant": "ptb3master",
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2020-11-17 02:44:38 +08:00
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"hw_rev": "v1.1",
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2020-11-16 16:38:20 +08:00
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"base": "master",
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2020-12-31 19:24:03 +08:00
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"ext_ref_frequency": 100e6,
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2020-11-16 16:38:20 +08:00
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"core_addr": "10.34.16.100",
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"peripherals": [
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{
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"type": "dio",
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"ports": [0],
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"board": "DIO_SMA",
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"hw_rev": "v1.1",
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"bank_direction_low": "input",
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"bank_direction_high": "output"
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},
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{
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"type": "dio",
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"ports": [1],
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"board": "DIO_SMA",
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"hw_rev": "v1.1",
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"bank_direction_low": "output",
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"bank_direction_high": "output"
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},
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{
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"type": "dio",
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"ports": [2],
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"board": "DIO_SMA",
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"hw_rev": "v1.1",
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"bank_direction_low": "output",
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"bank_direction_high": "output"
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},
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{
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"type": "sampler",
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"ports": [3]
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},
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{
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"type": "urukul",
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"ports": [5, 4],
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"dds": "ad9912",
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"clk_sel": 1,
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"refclk": 100e6,
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"pll_n": 10
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},
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{
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"type": "urukul",
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"ports": [6],
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"clk_sel": 1,
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"refclk": 100e6,
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"pll_n": 40
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},
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{
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"type": "zotino",
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"ports": [7]
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},
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{
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"type": "urukul",
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"ports": [9, 8],
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"dds": "ad9912",
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"clk_sel": 1,
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"refclk": 100e6,
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"pll_n": 10
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},
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{
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"type": "urukul",
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"ports": [11, 10],
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"clk_sel": 1,
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"refclk": 100e6,
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"pll_n": 40
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}
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]
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}
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