add DRTIO for RTM

This commit is contained in:
Joe Britton 2019-01-15 15:13:51 -05:00
parent e12255373c
commit cdd44a0631

21
pp.md
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@ -422,12 +422,12 @@ Each MTk includes a short report and option to implement.
## __MT3__ Sayma v2 ARTIQ Support
- __M31__ Review the code emerging from O14 and O15. Support merge into ARTIQ. Aspects included in review: DRTIO-on-RTM, DRTIO clock recovery on RTM, JESD204B deterministic latency/synchronization.
- __M3.01__ Review the code emerging from O14 and O15. Support merge into ARTIQ. Aspects included in review: DRTIO-on-RTM, DRTIO clock recovery on RTM, JESD204B deterministic latency/synchronization.
[TODO: does this include DDMTD?]
- __M32__ Work with TPOC to develop test cases for SAWG v2.1 with ST1 and ST2 in mind. Split into manual test cases and tests amendable to continuous integration (CI). Procure hardware needed for hardware-in-the-loop tests.
- __M3.02__ Work with TPOC to develop test cases for SAWG v2.1 with ST1 and ST2 in mind. Split into manual test cases and tests amendable to continuous integration (CI). Procure hardware needed for hardware-in-the-loop tests.
- __M33__ Support for Sayma_AMC to include the following
- __M3.03__ Support for Sayma_AMC to include the following
- power up
- boot tasks including JTAG, loading flash & FPGA
- UARTs
@ -440,7 +440,7 @@ Each MTk includes a short report and option to implement.
- FMC connectors
- build infrastructure and packaging
- __M34__ Support for Sayma_RTM to include the following
- __M3.04__ Support for Sayma_RTM to include the following
- power up
- boot tasks including slave serial loading of FPGA
- RTM clocking
@ -450,29 +450,29 @@ Each MTk includes a short report and option to implement.
- build infrastructure and packaging
- dependency: M33
- __M35__ Support for BaseMod to include the following
- __M3.05__ Support for BaseMod to include the following
- attenuator shift register
- DRTIO control of RF switches using TTL PHY
- dependency: M34
- __M36__ Validate RF output using SAWG v1.0. This tests operation of SAWG as developed for Sayma v1 works on Sayma v2. It tests the following elements.
- __M3.06__ Validate RF output using SAWG v1.0. This tests operation of SAWG as developed for Sayma v1 works on Sayma v2. It tests the following elements.
- clocking of AD9154
- SYSREF syncing of DAC and JESD core
- JESD204B to AD9154
- SAWG v1.0 integration
- dependency: M34
- __M37__ SAWG v2.0
- __M3.07__ SAWG v2.0
- ensure passage of tests ST1, ST2 and ST4
- Double check ST3 using code supplied under task O14
- dependencies: M36, O14
- __M38__ SAWG v2.1
- __M3.08__ SAWG v2.1
- ensure proper implementation of features in SAWG v2.1
- confirm that ST1, ST2, ST3 and ST4 tests still pass
- dependency: M37
- __M39__ Documentation
- __M3.09__ Documentation
- integrate manual and automated CI tests into ARTIQ infrastructure
- document manual and automated CI tests, hardware-in-the-loop infrastructure
- document CI infrastructure and how to run CI tests
@ -481,6 +481,9 @@ Each MTk includes a short report and option to implement.
- SAWG v2.1 ARTIQ Python API
- document underlying DSP architecture
- __M3.10__ DRTIO for RTM
- in Sayma v1.0 serwb was developed for communication between AMC FPGA and RTM FPGA
- replace serwb with pure RTIO link
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