M-Labs/saymapp
2
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Update pp.md

Browse Source
This commit is contained in:
Sébastien Bourdeauducq 2019-01-18 23:20:52 +08:00 committed by GitHub
parent 4c100eded9
commit 2f56e4d7bf
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 2 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
pp.md
View File

@ -254,7 +254,8 @@ Expectations for testing of all stuffed PCBs.
- AD built-in DAC JESD PRBS test at 10 Gb/s lane for both DACs
- SDRAM PRBS write-then-read at [TODO ____ data rate]
- AMC backplane ethernet PRBS at 1 GSPS
- SFP loop-back PRBS at 1 Gb/s
- SFP loop-back PRBS at 6 Gb/s
- AMC backplane PRBS at 6 Gb/s
- FMC loop-back PRBS [TODO ____ data rate]
- Realistic FPGA fabric load and clock activity
- MMC configuration including power supply sequencing and IPMI