diff --git a/src/migen_axi/cores/ps7.py b/src/migen_axi/cores/ps7.py
index 616b65c..ee56d19 100644
--- a/src/migen_axi/cores/ps7.py
+++ b/src/migen_axi/cores/ps7.py
@@ -396,9 +396,6 @@ class PS7(Module):
         self.ddr_arb = Signal(4)
         self.mio = Signal(54)
 
-        self.clock_domains.cd_sys = ClockDomain()
-        self.clock_domains.cd_por = ClockDomain(reset_less=True)
-
         self.dma0 = dmac_bus.Interface(name="dma0")
         self.dma1 = dmac_bus.Interface(name="dma1")
         self.dma2 = dmac_bus.Interface(name="dma2")
@@ -491,11 +488,6 @@ class PS7(Module):
         ]
 
         self.fclk = fclk_rec()
-        # fclk.reset_n considered async
-        self.specials += [
-            AsyncResetSynchronizer(self.cd_sys, ~self.fclk.reset_n[0]),
-            bufg([self.fclk.clk[0], ClockSignal()]),
-        ]
 
         self.comb += self.fclk.clktrig_n.eq(0)
         ftmd = ftmd_rec()