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riscv-formal-nmigen
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Refactor supported instructions to improve code reuse #1

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dsleung merged 84 commits from feature/refactor-insns into master 2020-08-06 09:47:30 +08:00
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insns/insn_lui.py
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@ -14,4 +14,13 @@ class rvfi_insn_lui(rvfi_insn_U_type):
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, self.insn_imm, 0))
m.d.comb += self.spec_pc_wdata.eq(self.rvfi_pc_rdata + 4)
# default assignments
m.d.comb += self.spec_rs1_addr.eq(0)
m.d.comb += self.spec_rs2_addr.eq(0)
m.d.comb += self.spec_trap.eq(~self.misa_ok)
m.d.comb += self.spec_mem_addr.eq(0)
m.d.comb += self.spec_mem_rmask.eq(0)
m.d.comb += self.spec_mem_wmask.eq(0)
m.d.comb += self.spec_mem_wdata.eq(0)
return m