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riscv-formal-nmigen
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Add (generic) RV32I I-Type Instruction

This commit is contained in:
Donald Sebastian Leung 2020-08-10 13:32:04 +08:00
parent ff977c0e50
commit e97a86bfbe
1 changed files with 13 additions and 0 deletions
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insns/InsnRV32IIType.py Normal file
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@ -0,0 +1,13 @@
from Insn import *
"""
RV32I I-Type Instruction
"""
class InsnRV32IIType(Insn):
def elaborate(self, platform):
m = super().elaborate(platform)
m.d.comb += self.insn_imm.eq(Value.as_signed(self.rvfi_insn[20:32]))
return m