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riscv-formal-nmigen
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Update README.md to reflect support for 64-bit ISAs

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Donald Sebastian Leung 2020-08-28 12:33:14 +08:00
parent b3acff2bf3
commit d25785c4b4
1 changed files with 2 additions and 2 deletions
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rvfi/insns/README.md
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@ -129,8 +129,8 @@ The following core-specific parameters are currently supported:
| Parameter | Description | Valid value(s) | | Parameter | Description | Valid value(s) |
| --- | --- | --- | | --- | --- | --- |
| `params.ilen` | Max length of instruction retired by core | `32` | | `params.ilen` | Max length of instruction retired by core | `32`, `64` |
| `params.xlen` | Width of integer registers | `32` | | `params.xlen` | Width of integer registers | `32`, `64` |
| `params.csr_misa` | Support for MISA CSRs enabled | `True`, `False` | | `params.csr_misa` | Support for MISA CSRs enabled | `True`, `False` |
| `params.compressed` | Support for compressed instructions | `True`, `False` | | `params.compressed` | Support for compressed instructions | `True`, `False` |
| `params.aligned_mem` | Require aligned memory accesses | `True`, `False` | | `params.aligned_mem` | Require aligned memory accesses | `True`, `False` |