From c72205d4338f4d4ffa2d293f367fb8a8d1dc9350 Mon Sep 17 00:00:00 2001
From: Donald Sebastian Leung
Date: Fri, 24 Jul 2020 13:13:03 +0800
Subject: [PATCH] Modify MUL instruction to use alternative operations
---
insns/insn_mul.py | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/insns/insn_mul.py b/insns/insn_mul.py
index 7e7fedd..2e45dfd 100644
--- a/insns/insn_mul.py
+++ b/insns/insn_mul.py
@@ -67,8 +67,10 @@ class rvfi_insn_mul(Elaboratable):
m.d.comb += misa_ok.eq(1)
# MUL instruction
+ altops_bitmask = Signal(64)
+ m.d.comb += altops_bitmask.eq(0x2cdf52a55876063e)
result = Signal(self.RISCV_FORMAL_XLEN)
- m.d.comb += result.eq(self.rvfi_rs1_rdata * self.rvfi_rs2_rdata)
+ m.d.comb += result.eq((self.rvfi_rs1_rdata + self.rvfi_rs2_rdata) ^ altops_bitmask)
m.d.comb += self.spec_valid.eq(self.rvfi_valid & (~insn_padding) & (insn_funct7 == 0b0000001) & (insn_funct3 == 0b000) & (insn_opcode == 0b0110011))
m.d.comb += self.spec_rs1_addr.eq(insn_rs1)
m.d.comb += self.spec_rs2_addr.eq(insn_rs2)