From 9ddc5563f75b2e5208a76839aaae4de90d0babb7 Mon Sep 17 00:00:00 2001 From: Donald Sebastian Leung Date: Thu, 30 Jul 2020 16:19:01 +0800 Subject: [PATCH] Fix JALR instruction --- insns/insn_I_type.py | 7 ------- insns/insn_jalr.py | 7 +++++++ 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/insns/insn_I_type.py b/insns/insn_I_type.py index 1ecf805..51a71d4 100644 --- a/insns/insn_I_type.py +++ b/insns/insn_I_type.py @@ -27,11 +27,4 @@ class rvfi_insn_I_type(rvfi_insn_general): m.d.comb += self.misa_ok.eq(1) m.d.comb += self.ialign16.eq(0) - # default assignments - m.d.comb += self.spec_rs2_addr.eq(0) - m.d.comb += self.spec_mem_addr.eq(0) - m.d.comb += self.spec_mem_rmask.eq(0) - m.d.comb += self.spec_mem_wmask.eq(0) - m.d.comb += self.spec_mem_wdata.eq(0) - return m diff --git a/insns/insn_jalr.py b/insns/insn_jalr.py index 28ad496..e4f3540 100644 --- a/insns/insn_jalr.py +++ b/insns/insn_jalr.py @@ -18,4 +18,11 @@ class rvfi_insn_jalr(rvfi_insn_I_type): m.d.comb += self.spec_pc_wdata.eq(next_pc) m.d.comb += self.spec_trap.eq(Mux(self.ialign16, next_pc[0] != 0, next_pc[:2] != 0) | ~self.misa_ok) + # default assignments + m.d.comb += self.spec_rs2_addr.eq(0) + m.d.comb += self.spec_mem_addr.eq(0) + m.d.comb += self.spec_mem_rmask.eq(0) + m.d.comb += self.spec_mem_wmask.eq(0) + m.d.comb += self.spec_mem_wdata.eq(0) + return m