diff --git a/insns/InsnLbu.py b/insns/InsnLbu.py
new file mode 100644
index 0000000..7ff15c0
--- /dev/null
+++ b/insns/InsnLbu.py
@@ -0,0 +1,9 @@
+from InsnRV32IITypeLoad import *
+
+"""
+LBU instruction
+"""
+
+class InsnLbu(InsnRV32IITypeLoad):
+    def __init__(self, RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, RISCV_FORMAL_COMPRESSED, RISCV_FORMAL_ALIGNED_MEM):
+        super().__init__(RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, RISCV_FORMAL_COMPRESSED, RISCV_FORMAL_ALIGNED_MEM, 0b100, 1, False)