From 395f29cf937924c4b42fea1f4f270403e84d32d6 Mon Sep 17 00:00:00 2001 From: Donald Sebastian Leung Date: Tue, 21 Jul 2020 17:55:28 +0800 Subject: [PATCH] Mention expected scope of project in README --- README.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/README.md b/README.md index 560e8f9..66ac6eb 100644 --- a/README.md +++ b/README.md @@ -10,6 +10,10 @@ A port of [riscv-formal](https://github.com/SymbioticEDA/riscv-formal) to nMigen TODO +## Support + +The full [RISC-V specification](https://riscv.org/specifications/) is hundreds of pages long including numerous possible extensions, some of which are still under active development at the time of writing. Therefore, this project does not aim to formalize the entire specification, but only the core parts of the specification, namely RV32I and perhaps RV32IM. Support for other extensions of the RISC-V specification may be added in the future. + ## License See [LICENSE](./LICENSE)