From 2e7cc106aac9b0f261ea2ae9e4d7f46cad6e2f04 Mon Sep 17 00:00:00 2001 From: Donald Sebastian Leung Date: Thu, 23 Jul 2020 12:57:32 +0800 Subject: [PATCH] Add missing return in ports in RV32I ISA --- insns/isa_rv32i.py | 1 + insns/isa_rv32i_gen.py | 1 + 2 files changed, 2 insertions(+) diff --git a/insns/isa_rv32i.py b/insns/isa_rv32i.py index 8fc3b9a..7160f62 100644 --- a/insns/isa_rv32i.py +++ b/insns/isa_rv32i.py @@ -45,6 +45,7 @@ class rvfi_isa_rv32i(Elaboratable): self.spec_mem_wmask, self.spec_mem_wdata ] + return input_ports + output_ports def elaborate(self, platform): m = Module() diff --git a/insns/isa_rv32i_gen.py b/insns/isa_rv32i_gen.py index 03b2ef3..9fa130c 100644 --- a/insns/isa_rv32i_gen.py +++ b/insns/isa_rv32i_gen.py @@ -48,6 +48,7 @@ with open('isa_rv32i.py', 'w') as isa_rv32i: fprint(" self.spec_mem_wmask,") fprint(" self.spec_mem_wdata") fprint(" ]") + fprint(" return input_ports + output_ports") fprint(" def elaborate(self, platform):") fprint(" m = Module()") fprint("")