From 283d8531e05d232e81f9fb3bdce49825dfa2d8a6 Mon Sep 17 00:00:00 2001
From: Donald Sebastian Leung <dl@m-labs.hk>
Date: Thu, 17 Sep 2020 17:06:55 +0800
Subject: [PATCH] Update README

---
 README.md | 17 +++++++----------
 1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/README.md b/README.md
index 98b495e..0c8a8f2 100644
--- a/README.md
+++ b/README.md
@@ -29,20 +29,17 @@ $ python -m rvfi.cores.minerva.verify
 
 This should run in the order of a few hours.
 
-### Progress
-
-- [x] Instruction Checks
-- [x] PC forward checks
-- [x] PC backward checks
-- [x] Register checks
-- [x] Causal checks
-- [x] Liveness checks
-- [x] Uniqueness checks
-
 ## Scope
 
 The RV32I, RV32M, RV64I and RV64M ISAs are currently implemented but only RV32IM are being tested by integrating with the Minerva core.
 
+## Possible improvements
+
+In no particular order:
+
+- Combine individual instruction checks into single ISA check (currently, doing so takes forever even when depth is set to only `20`)
+- Parallelize execution of verification tasks to reduce the total time required to run all verification tasks on a multi-core system
+
 ## License
 
 See [LICENSE](./LICENSE)