From 20a500157b90cc8beb200d2997234ff8615b3b40 Mon Sep 17 00:00:00 2001 From: Donald Sebastian Leung Date: Mon, 10 Aug 2020 12:46:09 +0800 Subject: [PATCH] Add attribution to SO in InsnSra.py --- insns/InsnSra.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/insns/InsnSra.py b/insns/InsnSra.py index 0b1f133..28dde78 100644 --- a/insns/InsnSra.py +++ b/insns/InsnSra.py @@ -10,6 +10,6 @@ class InsnSra(InsnRV32IRType): def elaborate(self, platform): m = super().elaborate(platform) - m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, (Value.as_signed(self.rvfi_rs1_rdata) >> Mux(self.RISCV_FORMAL_XLEN == 64, self.rvfi_rs2_rdata[:6], self.rvfi_rs2_rdata[:5])) | (-(Value.as_signed(self.rvfi_rs1_rdata) < 0) << (self.RISCV_FORMAL_XLEN - Mux(self.RISCV_FORMAL_XLEN == 64, self.rvfi_rs2_rdata[:6], self.rvfi_rs2_rdata[:5]))), 0)) + m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, (Value.as_signed(self.rvfi_rs1_rdata) >> Mux(self.RISCV_FORMAL_XLEN == 64, self.rvfi_rs2_rdata[:6], self.rvfi_rs2_rdata[:5])) | (-(Value.as_signed(self.rvfi_rs1_rdata) < 0) << (self.RISCV_FORMAL_XLEN - Mux(self.RISCV_FORMAL_XLEN == 64, self.rvfi_rs2_rdata[:6], self.rvfi_rs2_rdata[:5]))), 0)) # https://stackoverflow.com/a/25207042 return m