From 07e4c04b2645ced458094c2da787686a418a0192 Mon Sep 17 00:00:00 2001
From: Donald Sebastian Leung
Date: Fri, 7 Aug 2020 15:54:18 +0800
Subject: [PATCH] Add OR instruction
---
insns/InsnOr.py | 11 +++++++++++
1 file changed, 11 insertions(+)
create mode 100644 insns/InsnOr.py
diff --git a/insns/InsnOr.py b/insns/InsnOr.py
new file mode 100644
index 0000000..241faa0
--- /dev/null
+++ b/insns/InsnOr.py
@@ -0,0 +1,11 @@
+from InsnRV32IRType import *
+
+class InsnOr(InsnRV32IRType):
+ def __init__(self, RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, RISCV_FORMAL_COMPRESSED):
+ super(InsnOr, self).__init__(RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, RISCV_FORMAL_COMPRESSED, 0b0000000, 0b110, 0b0110011)
+ def elaborate(self, platform):
+ m = super(InsnOr, self).elaborate(platform)
+
+ m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, self.rvfi_rs1_rdata | self.rvfi_rs2_rdata, 0))
+
+ return m