From bec032ab756d436039fa6170c0cf26fc84a1fbc8 Mon Sep 17 00:00:00 2001 From: linuswck Date: Thu, 9 Jan 2025 16:53:00 +0800 Subject: [PATCH] gateware: Add sys_clk_double clk domain --- fast-servo/linien-gateware/fast_servo_soc.py | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/fast-servo/linien-gateware/fast_servo_soc.py b/fast-servo/linien-gateware/fast_servo_soc.py index 7592319..93b2e2d 100644 --- a/fast-servo/linien-gateware/fast_servo_soc.py +++ b/fast-servo/linien-gateware/fast_servo_soc.py @@ -51,6 +51,7 @@ class CRG(Module): clk_feedback_buf = Signal() clk_sys = Signal() + clk_sys_double = Signal() clk_idelay = Signal() self.specials += [ @@ -76,6 +77,10 @@ class CRG(Module): p_CLKOUT1_PHASE=0.0, p_CLKOUT1_DUTY_CYCLE=0.5, o_CLKOUT1=clk_idelay, # 200 MHZ <- 2 * sys_clk = 2*100 MHz + p_CLKOUT2_DIVIDE=5, + p_CLKOUT2_PHASE=0.0, + p_CLKOUT2_DUTY_CYCLE=0.5, + o_CLKOUT2=clk_sys_double, # 200 MHZ <- 2 * sys_clk_double = 2*100 MHz o_LOCKED=self.locked, ) ] @@ -83,7 +88,7 @@ class CRG(Module): self.specials += Instance("BUFG", i_I=clk_feedback, o_O=clk_feedback_buf) self.specials += Instance("BUFG", i_I=clk_sys, o_O=self.cd_sys.clk) self.specials += Instance("BUFG", i_I=clk_idelay, o_O=self.cd_idelay.clk) - self.specials += Instance("BUFG", i_I=clk_idelay, o_O=self.cd_sys_double.clk) + self.specials += Instance("BUFG", i_I=clk_sys_double, o_O=self.cd_sys_double.clk) # Ignore sys_clk to pll clkin path created by SoC's rst.