add fast-servo fsbl support

2024-01-29 17:47:03 +08:00 · 2024-01-29 17:47:03 +08:00 · ae31216084
parent e6f4512554
commit ae31216084
5 changed files with 25521 additions and 36 deletions
--- a/fast-servo/fsbl-support/ps7_init.c
+++ b/fast-servo/fsbl-support/ps7_init.c
--- a/fast-servo/fsbl-support/ps7_init_gpl.c
+++ b/fast-servo/fsbl-support/ps7_init_gpl.c
--- a/fast-servo/fsbl.patch
+++ b/fast-servo/fsbl.patch
@ -0,0 +1,241 @@
+diff --git a/lib/sw_apps/zynq_fsbl/misc/fast-servo/ps7_init.h b/lib/sw_apps/zynq_fsbl/misc/fast-servo/ps7_init.h
+index 9572636306..2f3816271e 100644
+--- a/lib/sw_apps/zynq_fsbl/misc/fast-servo/ps7_init.h
+++ b/lib/sw_apps/zynq_fsbl/misc/fast-servo/ps7_init.h
+@@ -67,20 +67,20 @@ extern unsigned long  * ps7_peripherals_init_data;
+ 
+ /* Freq of all peripherals */
+ 
+-#define APU_FREQ  666666687
+#define APU_FREQ  500000000
+ #define DDR_FREQ  533333374
+ #define DCI_FREQ  10158730
+ #define QSPI_FREQ  200000000
+ #define SMC_FREQ  10000000
+-#define ENET0_FREQ  25000000
+#define ENET0_FREQ  125000000
+ #define ENET1_FREQ  10000000
+ #define USB0_FREQ  60000000
+ #define USB1_FREQ  60000000
+-#define SDIO_FREQ  50000000
+-#define UART_FREQ  50000000
+-#define SPI_FREQ  10000000
+-#define I2C_FREQ  111111115
+-#define WDT_FREQ  111111115
+#define SDIO_FREQ  100000000
+#define UART_FREQ  100000000
+#define SPI_FREQ  166666672
+#define I2C_FREQ  83333336
+#define WDT_FREQ  83333336
+ #define TTC_FREQ  50000000
+ #define CAN_FREQ  10000000
+ #define PCAP_FREQ  200000000
+diff --git a/lib/sw_apps/zynq_fsbl/misc/fast-servo/ps7_init_gpl.h b/lib/sw_apps/zynq_fsbl/misc/fast-servo/ps7_init_gpl.h
+index 8962bed427..df2f16adec 100644
+--- a/lib/sw_apps/zynq_fsbl/misc/fast-servo/ps7_init_gpl.h
+++ b/lib/sw_apps/zynq_fsbl/misc/fast-servo/ps7_init_gpl.h
+@@ -81,20 +81,20 @@ extern unsigned long  * ps7_peripherals_init_data;
+ 
+ /* Freq of all peripherals */
+ 
+-#define APU_FREQ  666666687
+#define APU_FREQ  500000000
+ #define DDR_FREQ  533333374
+ #define DCI_FREQ  10158730
+ #define QSPI_FREQ  200000000
+ #define SMC_FREQ  10000000
+-#define ENET0_FREQ  25000000
+#define ENET0_FREQ  125000000
+ #define ENET1_FREQ  10000000
+ #define USB0_FREQ  60000000
+ #define USB1_FREQ  60000000
+-#define SDIO_FREQ  50000000
+-#define UART_FREQ  50000000
+-#define SPI_FREQ  10000000
+-#define I2C_FREQ  111111115
+-#define WDT_FREQ  111111115
+#define SDIO_FREQ  100000000
+#define UART_FREQ  100000000
+#define SPI_FREQ  166666672
+#define I2C_FREQ  83333336
+#define WDT_FREQ  83333336
+ #define TTC_FREQ  50000000
+ #define CAN_FREQ  10000000
+ #define PCAP_FREQ  200000000
+diff --git a/lib/sw_apps/zynq_fsbl/misc/fast-servo/xparameters.h b/lib/sw_apps/zynq_fsbl/misc/fast-servo/xparameters.h
+index 997a982ca1..5461fbb477 100644
+--- a/lib/sw_apps/zynq_fsbl/misc/fast-servo/xparameters.h
+++ b/lib/sw_apps/zynq_fsbl/misc/fast-servo/xparameters.h
+@@ -9,21 +9,26 @@
+ #define XPAR_CPU_ID 0U
+ 
+ /* Definitions for peripheral PS7_CORTEXA9_0 */
+-#define XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ 666666687
+#define XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ 500000000
+ 
+ 
+ /******************************************************************/
+ 
+ /* Canonical definitions for peripheral PS7_CORTEXA9_0 */
+-#define XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ 666666687
+#define XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ 500000000
+ 
+ 
+ /******************************************************************/
+ 
+
+/* Definitions for interface M_AXI_GP0 */
+#define XPAR_M_AXI_GP0_BASEADDR 0x40000000
+#define XPAR_M_AXI_GP0_HIGHADDR 0x40001FFF
+
+ #include "xparameters_ps.h"
+ 
+-#define STDIN_BASEADDRESS 0xE0001000
+-#define STDOUT_BASEADDRESS 0xE0001000
+#define STDIN_BASEADDRESS 0xE0000000
+#define STDOUT_BASEADDRESS 0xE0000000
+ 
+ /******************************************************************/
+ 
+@@ -120,7 +125,7 @@
+ #define XPAR_PS7_ETHERNET_0_DEVICE_ID 0
+ #define XPAR_PS7_ETHERNET_0_BASEADDR 0xE000B000
+ #define XPAR_PS7_ETHERNET_0_HIGHADDR 0xE000BFFF
+-#define XPAR_PS7_ETHERNET_0_ENET_CLK_FREQ_HZ 25000000
+#define XPAR_PS7_ETHERNET_0_ENET_CLK_FREQ_HZ 125000000
+ #define XPAR_PS7_ETHERNET_0_ENET_SLCR_1000MBPS_DIV0 8
+ #define XPAR_PS7_ETHERNET_0_ENET_SLCR_1000MBPS_DIV1 1
+ #define XPAR_PS7_ETHERNET_0_ENET_SLCR_100MBPS_DIV0 8
+@@ -138,7 +143,7 @@
+ #define XPAR_XEMACPS_0_DEVICE_ID XPAR_PS7_ETHERNET_0_DEVICE_ID
+ #define XPAR_XEMACPS_0_BASEADDR 0xE000B000
+ #define XPAR_XEMACPS_0_HIGHADDR 0xE000BFFF
+-#define XPAR_XEMACPS_0_ENET_CLK_FREQ_HZ 25000000
+#define XPAR_XEMACPS_0_ENET_CLK_FREQ_HZ 125000000
+ #define XPAR_XEMACPS_0_ENET_SLCR_1000Mbps_DIV0 8
+ #define XPAR_XEMACPS_0_ENET_SLCR_1000Mbps_DIV1 1
+ #define XPAR_XEMACPS_0_ENET_SLCR_100Mbps_DIV0 8
+@@ -265,13 +270,13 @@
+ /******************************************************************/
+ 
+ /* Definitions for driver IICPS */
+-#define XPAR_XIICPS_NUM_INSTANCES 1
+#define XPAR_XIICPS_NUM_INSTANCES 2
+ 
+ /* Definitions for peripheral PS7_I2C_0 */
+ #define XPAR_PS7_I2C_0_DEVICE_ID 0
+ #define XPAR_PS7_I2C_0_BASEADDR 0xE0004000
+ #define XPAR_PS7_I2C_0_HIGHADDR 0xE0004FFF
+-#define XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ 111111115
+#define XPAR_PS7_I2C_0_I2C_CLK_FREQ_HZ 83333336
+ 
+ 
+ /******************************************************************/
+@@ -280,7 +285,7 @@
+ #define XPAR_XIICPS_0_DEVICE_ID XPAR_PS7_I2C_0_DEVICE_ID
+ #define XPAR_XIICPS_0_BASEADDR 0xE0004000
+ #define XPAR_XIICPS_0_HIGHADDR 0xE0004FFF
+-#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 111111115
+#define XPAR_XIICPS_0_I2C_CLK_FREQ_HZ 83333336
+ 
+ 
+ /******************************************************************/
+@@ -376,9 +381,9 @@
+ #define XPAR_PS7_SD_0_DEVICE_ID 0
+ #define XPAR_PS7_SD_0_BASEADDR 0xE0100000
+ #define XPAR_PS7_SD_0_HIGHADDR 0xE0100FFF
+-#define XPAR_PS7_SD_0_SDIO_CLK_FREQ_HZ 50000000
+-#define XPAR_PS7_SD_0_HAS_CD 1
+-#define XPAR_PS7_SD_0_HAS_WP 1
+#define XPAR_PS7_SD_0_SDIO_CLK_FREQ_HZ 100000000
+#define XPAR_PS7_SD_0_HAS_CD 0
+#define XPAR_PS7_SD_0_HAS_WP 0
+ #define XPAR_PS7_SD_0_BUS_WIDTH 0
+ #define XPAR_PS7_SD_0_MIO_BANK 0
+ #define XPAR_PS7_SD_0_HAS_EMIO 0
+@@ -398,9 +403,9 @@
+ #define XPAR_XSDPS_0_DEVICE_ID XPAR_PS7_SD_0_DEVICE_ID
+ #define XPAR_XSDPS_0_BASEADDR 0xE0100000
+ #define XPAR_XSDPS_0_HIGHADDR 0xE0100FFF
+-#define XPAR_XSDPS_0_SDIO_CLK_FREQ_HZ 50000000
+-#define XPAR_XSDPS_0_HAS_CD 1
+-#define XPAR_XSDPS_0_HAS_WP 1
+#define XPAR_XSDPS_0_SDIO_CLK_FREQ_HZ 100000000
+#define XPAR_XSDPS_0_HAS_CD 0
+#define XPAR_XSDPS_0_HAS_WP 0
+ #define XPAR_XSDPS_0_BUS_WIDTH 0
+ #define XPAR_XSDPS_0_MIO_BANK 0
+ #define XPAR_XSDPS_0_HAS_EMIO 0
+@@ -422,15 +427,15 @@
+ /* Definitions for peripheral PS7_TTC_0 */
+ #define XPAR_PS7_TTC_0_DEVICE_ID 0U
+ #define XPAR_PS7_TTC_0_BASEADDR 0XF8001000U
+-#define XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ 111111115U
+#define XPAR_PS7_TTC_0_TTC_CLK_FREQ_HZ 83333336U
+ #define XPAR_PS7_TTC_0_TTC_CLK_CLKSRC 0U
+ #define XPAR_PS7_TTC_1_DEVICE_ID 1U
+ #define XPAR_PS7_TTC_1_BASEADDR 0XF8001004U
+-#define XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ 111111115U
+#define XPAR_PS7_TTC_1_TTC_CLK_FREQ_HZ 83333336U
+ #define XPAR_PS7_TTC_1_TTC_CLK_CLKSRC 0U
+ #define XPAR_PS7_TTC_2_DEVICE_ID 2U
+ #define XPAR_PS7_TTC_2_BASEADDR 0XF8001008U
+-#define XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ 111111115U
+#define XPAR_PS7_TTC_2_TTC_CLK_FREQ_HZ 83333336U
+ #define XPAR_PS7_TTC_2_TTC_CLK_CLKSRC 0U
+ 
+ 
+@@ -439,17 +444,17 @@
+ /* Canonical definitions for peripheral PS7_TTC_0 */
+ #define XPAR_XTTCPS_0_DEVICE_ID XPAR_PS7_TTC_0_DEVICE_ID
+ #define XPAR_XTTCPS_0_BASEADDR 0xF8001000U
+-#define XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ 111111115U
+#define XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ 83333336U
+ #define XPAR_XTTCPS_0_TTC_CLK_CLKSRC 0U
+ 
+ #define XPAR_XTTCPS_1_DEVICE_ID XPAR_PS7_TTC_1_DEVICE_ID
+ #define XPAR_XTTCPS_1_BASEADDR 0xF8001004U
+-#define XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ 111111115U
+#define XPAR_XTTCPS_1_TTC_CLK_FREQ_HZ 83333336U
+ #define XPAR_XTTCPS_1_TTC_CLK_CLKSRC 0U
+ 
+ #define XPAR_XTTCPS_2_DEVICE_ID XPAR_PS7_TTC_2_DEVICE_ID
+ #define XPAR_XTTCPS_2_BASEADDR 0xF8001008U
+-#define XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ 111111115U
+#define XPAR_XTTCPS_2_TTC_CLK_FREQ_HZ 83333336U
+ #define XPAR_XTTCPS_2_TTC_CLK_CLKSRC 0U
+ 
+ 
+@@ -458,21 +463,21 @@
+ /* Definitions for driver UARTPS */
+ #define XPAR_XUARTPS_NUM_INSTANCES 1
+ 
+-/* Definitions for peripheral PS7_UART_1 */
+-#define XPAR_PS7_UART_1_DEVICE_ID 0
+-#define XPAR_PS7_UART_1_BASEADDR 0xE0001000
+-#define XPAR_PS7_UART_1_HIGHADDR 0xE0001FFF
+-#define XPAR_PS7_UART_1_UART_CLK_FREQ_HZ 50000000
+-#define XPAR_PS7_UART_1_HAS_MODEM 0
+/* Definitions for peripheral PS7_UART_0 */
+#define XPAR_PS7_UART_0_DEVICE_ID 0
+#define XPAR_PS7_UART_0_BASEADDR 0xE0000000
+#define XPAR_PS7_UART_0_HIGHADDR 0xE0000FFF
+#define XPAR_PS7_UART_0_UART_CLK_FREQ_HZ 100000000
+#define XPAR_PS7_UART_0_HAS_MODEM 0
+ 
+ 
+ /******************************************************************/
+ 
+-/* Canonical definitions for peripheral PS7_UART_1 */
+-#define XPAR_XUARTPS_0_DEVICE_ID XPAR_PS7_UART_1_DEVICE_ID
+-#define XPAR_XUARTPS_0_BASEADDR 0xE0001000
+-#define XPAR_XUARTPS_0_HIGHADDR 0xE0001FFF
+-#define XPAR_XUARTPS_0_UART_CLK_FREQ_HZ 50000000
+/* Canonical definitions for peripheral PS7_UART_0 */
+#define XPAR_XUARTPS_0_DEVICE_ID XPAR_PS7_UART_0_DEVICE_ID
+#define XPAR_XUARTPS_0_BASEADDR 0xE0000000
+#define XPAR_XUARTPS_0_HIGHADDR 0xE0000FFF
+#define XPAR_XUARTPS_0_UART_CLK_FREQ_HZ 100000000
+ #define XPAR_XUARTPS_0_HAS_MODEM 0
+ 
+ 
--- a/flake.nix
+++ b/flake.nix
@ -9,6 +9,7 @@
    let
      pkgs = import nixpkgs { system = "x86_64-linux"; };
      not-os-cfg = not-os-configured.config.system;
+      fsbl-support = ./fast-servo/fsbl-support;

      patched-not-os = pkgs.applyPatches {
        name = "not-os-patched";
@ -163,17 +164,21 @@
        src = pkgs.fetchFromGitHub {
          owner = "Xilinx";
          repo = "embeddedsw";
-          rev = "65c849ed46c88c67457e1fc742744f96db968ff1";
-          sha256 = "1rvl06ha40dzd6s9aa4sylmksh4xb9dqaxq462lffv1fdk342pda";
+          rev = "xilinx_v2022.2";
+          sha256 = "sha256-UDz9KK/Hw3qM1BAeKif30rE8Bi6C2uvuZlvyvtJCMfw=";
        };
-        patches = [ ./fsbl.patch ];
        nativeBuildInputs = [
          pkgs.gnumake
          gnutoolchain.binutils
          gnutoolchain.gcc
        ];
-        patchPhase = ''
-          patch -p1 -i ${./fsbl.patch}
+        postUnpack = ''
+          mkdir -p $sourceRoot/lib/sw_apps/zynq_fsbl/misc/fast-servo
+          cp $sourceRoot/lib/sw_apps/zynq_fsbl/misc/zc706/* $sourceRoot/lib/sw_apps/zynq_fsbl/misc/fast-servo
+          cp ${fsbl-support}/* $sourceRoot/lib/sw_apps/zynq_fsbl/misc/fast-servo
+        '';
+        patches = [] ++ pkgs.lib.optional (board == "fast-servo") ./fast-servo/fsbl.patch;
+        postPatch = ''
          patchShebangs lib/sw_apps/zynq_fsbl/misc/copy_bsp.sh
          echo 'SEARCH_DIR("${gnutoolchain.newlib}/arm-none-eabi/lib");' >> lib/sw_apps/zynq_fsbl/src/lscript.ld
        '';
@ -375,6 +380,7 @@
        zc706-qemu = not-os-qemu { board = "zc706"; };
        zc706-sd-image = sd-image { board = "zc706"; };
        zc706-not-os = not-os-cfg.build.zynq_image;
+        fast-servo-fsbl = fsbl { board = "fast-servo"; };
        fast-servo-dtb = device-tree { board = "fast-servo"; };
        fast-servo-u-boot = u-boot { board = "fast-servo"; };
      };
--- a/fsbl.patch
+++ b/fsbl.patch
@ -1,31 +0,0 @@
-diff --git a/lib/sw_apps/zynq_fsbl/src/Makefile b/lib/sw_apps/zynq_fsbl/src/Makefile
-index 0e3ccdf1c5..a5b02f386e 100644
--- a/lib/sw_apps/zynq_fsbl/src/Makefile
-+++ b/lib/sw_apps/zynq_fsbl/src/Makefile
-@@ -71,11 +71,14 @@ endif
- all: $(EXEC)
- 
- $(EXEC): $(LIBS) $(OBJS) $(INCLUDES)
-	cp $(BSP_DIR)/$(BOARD)/ps7_init.* .
- 	$(LINKER) $(LD1FLAGS)  -o $@ $(OBJS) $(LDFLAGS)
- 	rm -rf $(OBJS)
-	
-	
-+
-+.PHONY: ps7_init
-+
-+ps7_init:
-+	cp $(BSP_DIR)/$(BOARD)/ps7_init.* .
-+
- $(LIBS): 
- 	echo "Copying BSP files"
- 	$(BSP_DIR)/copy_bsp.sh $(BOARD) $(CC)
-@@ -86,7 +89,7 @@ $(LIBS):
-         make -C $(BSP_DIR) -k all "CC=armcc" "AR=armar" "C_FLAGS= -O2 -c" "EC_FLAGS=--debug --wchar32"; \
- 	fi;
- 
-%.o:%.c
-+%.o:%.c ps7_init
- 	$(CC) $(CC_FLAGS) $(CFLAGS) $(ECFLAGS) -c $< -o $@ $(INCLUDEPATH)
- 
- %.o:%.S