From 5d55ab4c9c910105548ac9c935e46bdeec6fea65 Mon Sep 17 00:00:00 2001 From: linuswck Date: Fri, 8 Nov 2024 13:09:05 +0800 Subject: [PATCH] pyfastservo dac: reacquire clk relationship at init --- fast-servo/pyfastservo/dac.py | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/fast-servo/pyfastservo/dac.py b/fast-servo/pyfastservo/dac.py index 72f8f61..e92433d 100644 --- a/fast-servo/pyfastservo/dac.py +++ b/fast-servo/pyfastservo/dac.py @@ -63,7 +63,10 @@ def configure_dac(spi): spi_write(spi, 0x07, 0xA0) # Enable on-chip QRSET (1.6 kΩ for 20mA output) spi_write(spi, 0x05, 0x00) # Disable internal IRCML spi_write(spi, 0x08, 0x00) # Disable internal QRCML - spi_write(spi, 0x02, 0xB4) # Enable 2's complement, LVDS interface, 4 LVDS lanes + spi_write(spi, 0x02, 0xB4) # Enable 2's complement, IFirst: True, IRising: True, DCI_EN: Enabled + spi_write(spi, 0x14, 0x00) + spi_write(spi, 0x14, 0x08) # Trigger the retimer to reacquire the clock relationship + spi_write(spi, 0x14, 0x00) def dac_self_calibration(spi): spi_write(spi, 0x12, 0x00) # Reset calibration status @@ -111,6 +114,16 @@ def set_dac_output(value): write_to_memory(CH1_LOW_WORD_ADDR, low_word) print(f"DAC output set to: 0x{value:04X}") +def check_clk_relationship(spi): + clkmode_reg = spi_read(spi, 0x14) + print(f"CLKMODE reg: 0x{clkmode_reg:02X}") + if clkmode_reg & 0b00010000: + print("Clock relationship is not found") + return False + else: + print("Clock relationship is found") + return True + def configure_ad9117(): spi = spidev.SpiDev() spi.open(MAIN_DAC_BUS, MAIN_DAC_DEVICE) @@ -125,6 +138,7 @@ def configure_ad9117(): return False configure_dac(spi) + check_clk_relationship(spi) dac_self_calibration(spi) # Enable DAC outputs