gateware: Add pipeline to fast_chain calculation

- Fix timing violations at 125MHz sys frequency

fast-servo/linien-gateware-chain-pipeline.patch

@@ -0,0 +1,35 @@
+diff --git a/gateware/logic/chains.py b/gateware/logic/chains.py
+index a890849..3461a78 100644
+--- a/gateware/logic/chains.py
++++ b/gateware/logic/chains.py
+@@ -93,7 +93,6 @@ class FastChain(Module, AutoCSR):
+ 
+             self.comb += [
+                 x_limit.x.eq(([self.demod.i, self.demod.q][sub_channel_idx] << s) + dx),
+-                iir_c.x.eq(x_limit.y),
+                 iir_c.hold.eq(0),
+                 iir_c.clear.eq(0),
+                 iir_d.x.eq(iir_c.y),
+@@ -101,14 +100,20 @@ class FastChain(Module, AutoCSR):
+                 iir_d.clear.eq(0),
+             ]
+ 
++            self.sync += [
++                iir_c.x.eq(x_limit.y)
++            ]
++
+             ys = Array([iir_c.x, iir_c.y, iir_d.y])
+ 
+             output_signal_this_channel = (self.out_i, self.out_q)[sub_channel_idx]
+-            self.comb += [
++            self.sync += [
+                 y_limit.x.eq(
+                     Mux(self.invert.storage, -1, 1)
+                     * (ys[self.y_tap.storage] + (ya << s) + (offset_signal << s))
+-                ),
++                )
++            ]
++            self.comb += [
+                 output_signal_this_channel.eq(y_limit.y),
+             ]
+ 

flake.nix

@@ -39,6 +39,7 @@
             ./fast-servo/linien_module_pipeline.patch
             ./fast-servo/pid_pipeline.patch
             ./fast-servo/pid_err_sig_pipeline.patch
+            ./fast-servo/linien-gateware-chain-pipeline.patch
           ];
       };