pyfastservo adc: Add mmcm rst after ADC is rst

This commit is contained in:
linuswck 2024-11-08 12:53:37 +08:00
parent 382e8467d9
commit 4940ee52cc
1 changed files with 13 additions and 2 deletions

View File

@ -17,7 +17,7 @@
# You should have received a copy of the GNU General Public License # You should have received a copy of the GNU General Public License
# along with this program. If not, see <https://www.gnu.org/licenses/>. # along with this program. If not, see <https://www.gnu.org/licenses/>.
import time
import spidev import spidev
from pyfastservo.common import ( from pyfastservo.common import (
ADC_AFE_CTRL_ADDR, ADC_AFE_CTRL_ADDR,
@ -78,13 +78,21 @@ def read_frame():
def perform_bitslip(): def perform_bitslip():
for i in range(4): for i in range(4):
current_frame = read_frame() current_frame = read_frame()
if current_frame != 0x0C: if current_frame & 0x0F != 0x0C:
print(f"Performing bitslip (iteration: {i}). Current frame: 0x{current_frame:02x}") print(f"Performing bitslip (iteration: {i}). Current frame: 0x{current_frame:02x}")
write_to_memory(ADC_BITSLIP_ADDR, 1) write_to_memory(ADC_BITSLIP_ADDR, 1)
else: else:
print(f"No bitslip required; Current frame: 0x{current_frame:02x}") print(f"No bitslip required; Current frame: 0x{current_frame:02x}")
return return
def mmcm_rst():
curr_cfg = read_from_memory(ADC_AFE_CTRL_ADDR, 1)[0] & 0x0F
write_to_memory(ADC_AFE_CTRL_ADDR, 0x10 | curr_cfg) # Reset MMCM
write_to_memory(ADC_AFE_CTRL_ADDR, 0x00 | curr_cfg) # Release MMCM Reset
while not(read_frame() & 0x10):
print(f"Waiting for MMCM to lock")
time.sleep(0.001)
def find_edge(): def find_edge():
prev_frame = read_frame() prev_frame = read_frame()
for tap_delay in range(32): for tap_delay in range(32):
@ -141,6 +149,9 @@ def configure_ltc2195():
0x04: test_pattern & 0xFF 0x04: test_pattern & 0xFF
}) })
# ADC software reset put its PLL to sleep momentarily. Thus, MMCM needs to be reset as well.
mmcm_rst()
# Performing Word Align # Performing Word Align
perform_bitslip() perform_bitslip()
find_edge() find_edge()