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check that FPGA bitstreams meet timing #15

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opened 2019-05-22 00:33:29 +08:00 by sb10q · 4 comments
sb10q commented 2019-05-22 00:33:29 +08:00
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Look at the Vivado logs c.f. how it was done previously in https://github.com/m-labs/buildbot-config

Look at the Vivado logs c.f. how it was done previously in https://github.com/m-labs/buildbot-config
sb10q commented 2019-05-22 00:34:43 +08:00
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3317296c82/steps/xilinx.py

https://github.com/m-labs/buildbot-config/blob/3317296c82a42c73e05cc604e4c2bbc0e1cbbe72/steps/xilinx.py
sb10q commented 2019-05-28 23:44:23 +08:00
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Seems to work.

Seems to work.
sb10q closed this issue 2019-05-28 23:44:23 +08:00
sb10q commented 2020-04-06 21:03:40 +08:00
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https://nixbld.m-labs.hk/build/51573
failed timing and marked as successful.

https://nixbld.m-labs.hk/build/51573 failed timing and marked as successful.
sb10q reopened this issue 2020-04-06 21:03:49 +08:00
astro closed this issue 2020-06-25 06:23:29 +08:00
sb10q commented 2020-06-25 10:40:52 +08:00
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Thanks!

Thanks!
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Reference: M-Labs/nix-scripts#15
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