check that FPGA bitstreams meet timing #15

Closed
opened 2019-05-22 00:33:29 +08:00 by sb10q · 4 comments

Look at the Vivado logs c.f. how it was done previously in https://github.com/m-labs/buildbot-config

Look at the Vivado logs c.f. how it was done previously in https://github.com/m-labs/buildbot-config
Poster
Owner
https://github.com/m-labs/buildbot-config/blob/3317296c82a42c73e05cc604e4c2bbc0e1cbbe72/steps/xilinx.py
Poster
Owner

Seems to work.

Seems to work.
sb10q closed this issue 2019-05-28 23:44:23 +08:00
Poster
Owner

https://nixbld.m-labs.hk/build/51573
failed timing and marked as successful.

https://nixbld.m-labs.hk/build/51573 failed timing and marked as successful.
sb10q reopened this issue 2020-04-06 21:03:49 +08:00
astro closed this issue 2020-06-25 06:23:29 +08:00
Poster
Owner

Thanks!

Thanks!
Sign in to join this conversation.
No Label
No Milestone
No Assignees
1 Participants
Notifications
Due Date
The due date is invalid or out of range. Please use the format 'yyyy-mm-dd'.

No due date set.

Dependencies

No dependencies set.

Reference: M-Labs/nix-scripts#15
There is no content yet.