avoid unnecessary gateware rebuilds #1

New Issue

sb10q · 2019-04-19T13:22:37+08:00

sb10q commented

2019-04-19 13:22:37 +08:00

With the Nix model it is relatively straightforward to reuse and cache artifacts between builds (in particular the bitstream, which is slow to compile):

split the gateware version tagging into a separate step that modifies the .bit and takes little time. That probably needs some modifications to the identifier gateware core, plus something like ISE's Data2BRAM.
have Nix manage fine-grained build steps (instead of just running the ARTIQ target script that does everything) and make Nix aware of the precise inputs of each step.

With the Nix model it is relatively straightforward to reuse and cache artifacts between builds (in particular the bitstream, which is slow to compile): 1. split the gateware version tagging into a separate step that modifies the .bit and takes little time. That probably needs some modifications to the identifier gateware core, plus something like ISE's Data2BRAM. 2. have Nix manage fine-grained build steps (instead of just running the ARTIQ target script that does everything) and make Nix aware of the precise inputs of each step.

sb10q referenced this issue from a commit

2019-12-25 14:39:33 +08:00

astro referenced this issue from a commit

2020-01-06 10:26:33 +08:00

artiq-fast: split artiq-board software/gateware builds Addresses Gitea issue #1.

astro referenced this issue from a commit

2020-01-06 10:26:33 +08:00

artiq-fast: build bitstream with only generated source as input Addresses Gitea issue #1.

astro commented

2020-01-08 10:22:35 +08:00

I've found a way to accomplish this in the Nix part of the build. I'm going to prepare a Merge Request for review once I'm done testing (these runs take long).

I have yet to find the version info in the bitstream sources.

I've found a way to accomplish this in the Nix part of the build. I'm going to prepare a Merge Request for review once I'm done testing (these runs take long). I have yet to find the version info in the bitstream sources.

sb10q commented

2020-01-08 10:25:44 +08:00

The version info is in the "identifier" core from MiSoC.
You will have to change it to use BRAM since I suspect that the current code that may produce combinatorial logic with LUTs will be difficult to edit post-compilation.

The version info is in the "identifier" core from MiSoC. You will have to change it to use BRAM since I suspect that the current code that may produce combinatorial logic with LUTs will be difficult to edit post-compilation.

astro referenced this issue from a commit

2020-01-09 08:13:42 +08:00

artiq-fast: build gateware from a self-contained separate source derivation Addresses item 2. of Gitea issue #1.

sb10q commented

2020-03-12 22:25:59 +08:00

Since 9e66dd7075 the identifier can be rewritten without rebuilding the whole gateware.

Run vivado -mode tcl and then:

open_checkpoint top_route.dcp
set_property INIT_38 256'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF43424103 [get_cells identifier_str]
write_bitstream -force top.bit

The new identifier string appears in the log:

 __  __ _ ____         ____ 
|  \/  (_) ___|  ___  / ___|
| |\/| | \___ \ / _ \| |    
| |  | | |___) | (_) | |___ 
|_|  |_|_|____/ \___/ \____|

MiSoC Bootloader
Copyright (c) 2017-2020 M-Labs Limited

Bootloader CRC passed
Gateware ident ABC
Initializing SDRAM...

....

[     0.000009s]  INFO(runtime): ARTIQ runtime starting...
[     0.003934s]  INFO(runtime): software ident 5.0.dev+852.g380de177.dirty;tester
[     0.011170s]  INFO(runtime): gateware ident ABC

Since https://github.com/m-labs/artiq/commit/9e66dd70757a7fe9881a4bdd837fa382d59bdabf the identifier can be rewritten without rebuilding the whole gateware. Run ``vivado -mode tcl`` and then: ```text open_checkpoint top_route.dcp set_property INIT_38 256'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF43424103 [get_cells identifier_str] write_bitstream -force top.bit ``` The new identifier string appears in the log: ``` __ __ _ ____ ____ | \/ (_) ___| ___ / ___| | |\/| | \___ \ / _ \| | | | | | |___) | (_) | |___ |_| |_|_|____/ \___/ \____| MiSoC Bootloader Copyright (c) 2017-2020 M-Labs Limited Bootloader CRC passed Gateware ident ABC Initializing SDRAM... .... [ 0.000009s] INFO(runtime): ARTIQ runtime starting... [ 0.003934s] INFO(runtime): software ident 5.0.dev+852.g380de177.dirty;tester [ 0.011170s] INFO(runtime): gateware ident ABC ```

sb10q commented

2020-03-12 22:36:11 +08:00

NB: I have not tried using more optimal primitives (e.g. ROM256X1).

sb10q commented

2020-03-12 23:09:27 +08:00

Ok, it also works with ROM256X1 :)

astro referenced this issue from a commit

2020-08-21 05:52:42 +08:00

artiq-fast: build gateware from a self-contained separate source derivation Addresses item 2. of Gitea issue #1.

astro commented

2020-08-26 09:05:04 +08:00

Are these TCL commands still supposed to work?

get_cells identifier_str
WARNING: [Vivado 12-180] No cells matched 'identifier_str'.

This returns some cells but none looks like having to do with the ident:

get_cells -hierarchical * -filter {INIT_38=~*}

Are these TCL commands still supposed to work? ```tcl get_cells identifier_str WARNING: [Vivado 12-180] No cells matched 'identifier_str'. ``` This returns some cells but none looks like having to do with the ident: ```tcl get_cells -hierarchical * -filter {INIT_38=~*} ```

sb10q commented

2020-08-26 11:07:26 +08:00

See the next commit 4a8d361ace.
The memory is now made up of eight ROM256X1 called identifier_str0 ... identifier_str7.

See the next commit https://github.com/m-labs/artiq/commit/4a8d361acebf1e6b45e9fe35201315798b02d2f3. The memory is now made up of eight ROM256X1 called ```identifier_str0``` ... ```identifier_str7```.

astro commented

2020-08-27 03:13:01 +08:00

Ok, in my case they were optimized away with .INIT(32'd0).

Using 32'hAAAAAAAA keeps that from happening.

Ok, in my case they were optimized away with `.INIT(32'd0)`. Using `32'hAAAAAAAA` keeps that from happening.

astro referenced this issue from a commit

2020-08-27 05:29:56 +08:00

artiq-fast: build gateware from a self-contained separate source derivation Addresses item 2. of Gitea issue #1.

astro referenced this issue from a commit

2020-11-27 01:31:45 +08:00

artiq-fast: build gateware from a self-contained separate source derivation Addresses item 2. of Gitea issue #1.

astro referenced this issue from a commit