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Author SHA1 Message Date
Ada be6b907eea add our own packages to nix environment 2022-02-23 19:06:04 -07:00
17 changed files with 329 additions and 996 deletions

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@ -59,9 +59,8 @@ in
extended-tests = pkgs.stdenv.mkDerivation {
name = "extended-tests";
__networked = true; # compatibility with old patched Nix
# breaks hydra, https://github.com/NixOS/hydra/issues/1216
#__impure = true; # Nix 2.8+
# requires patched Nix
__networked = true;
buildInputs = [
(pkgs.python3.withPackages(ps: [ ps.paramiko artiqpkgs.artiq artiqpkgs.artiq-board-kc705-nist_clock ]))
@ -75,7 +74,7 @@ in
mkdir $HOME/.ssh
cp /opt/hydra_id_ed25519 $HOME/.ssh/id_ed25519
cp /opt/hydra_id_ed25519.pub $HOME/.ssh/id_ed25519.pub
echo "rpi-1 ssh-ed25519 AAAAC3NzaC1lZDI1NTE5AAAAIACtBFDVBYoAE4fpJCTANZSE0bcVpTR3uvfNvb80C4i5" > $HOME/.ssh/known_hosts
echo "rpi-1 ssh-ed25519 AAAAC3NzaC1lZDI1NTE5AAAAIPOBQVcsvk6WgRj18v4m0zkFeKrcN9gA+r6sxQxNwFpv" > $HOME/.ssh/known_hosts
chmod 600 $HOME/.ssh/id_ed25519
LOCKCTL=$(mktemp -d)
mkfifo $LOCKCTL/lockctl

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@ -4,7 +4,6 @@ let
artiq6 = pkgs.lib.strings.versionAtLeast mainPackages.artiq.version "6.0";
artiq7 = pkgs.lib.strings.versionAtLeast mainPackages.artiq.version "7.0";
pythonDeps = import ./pkgs/python-deps.nix { inherit (pkgs) lib fetchgit fetchFromGitHub python3Packages; misoc-new = artiq7; };
rustPlatform = import ./rust-platform.nix { inherit pkgs; };
boards = [
{ target = "kasli"; variant = "tester"; }
@ -12,7 +11,7 @@ let
];
boardPackages = pkgs.lib.lists.foldr (board: start:
let
boardBinaries = import ./artiq-board.nix { inherit pkgs rustPlatform; } {
boardBinaries = import ./artiq-board.nix { inherit pkgs; } {
target = board.target;
variant = board.variant;
};
@ -22,22 +21,20 @@ let
}) {} boards;
mainPackages = rec {
inherit (pythonDeps) sipyco asyncserial pythonparser artiq-netboot misoc migen microscope jesd204b migen-axi lit outputcheck qasync;
inherit (pythonDeps) sipyco artiq_tools asyncserial pythonparser artiq-netboot misoc migen microscope jesd204b migen-axi lit outputcheck qasync pyqtgraph;
binutils-or1k = callPackage ./pkgs/binutils.nix { platform = "or1k"; target = "or1k-linux"; };
binutils-arm = callPackage ./pkgs/binutils.nix { platform = "arm"; target = "armv7-unknown-linux-gnueabihf"; };
llvm-or1k = callPackage ./pkgs/llvm-or1k.nix {};
rustc-legacy = callPackage ./pkgs/rust-legacy/rustc-with-crates.nix
rustc = callPackage ./pkgs/rust/rustc-with-crates.nix
((lib.optionalAttrs (stdenv.cc.isGNU && stdenv.hostPlatform.isi686) {
stdenv = overrideCC stdenv gcc6; # with gcc-7: undefined reference to `__divmoddi4'
}) //
{ inherit llvm-or1k; });
rustc = if artiq7 then rustPlatform.rust.rustc else rustc-legacy;
cargo-legacy = callPackage ./pkgs/rust-legacy/cargo.nix { inherit rustc; rustPlatform = rustPackages_1_45.rustPlatform; };
cargo-vendor-legacy = callPackage ./pkgs/rust-legacy/cargo-vendor.nix {};
cargo = callPackage ./pkgs/rust/cargo.nix { inherit rustc; rustPlatform = rustPackages_1_45.rustPlatform; };
cargo-vendor = callPackage ./pkgs/rust/cargo-vendor.nix {};
llvmlite-artiq = callPackage ./pkgs/llvmlite-artiq.nix { inherit llvm-or1k; };
llvmlite-llvm11 = callPackage ./pkgs/llvmlite-llvm11.nix { };
libartiq-support = callPackage ./pkgs/libartiq-support.nix { inherit rustc; };
artiq = callPackage ./pkgs/artiq.nix { inherit pythonDeps binutils-or1k binutils-arm llvm-or1k llvmlite-artiq llvmlite-llvm11 libartiq-support lit outputcheck; };
artiq = callPackage ./pkgs/artiq.nix { inherit pythonDeps binutils-or1k binutils-arm llvm-or1k llvmlite-artiq libartiq-support lit outputcheck; };
artiq-env = (pkgs.python3.withPackages(ps: [ artiq ])).overrideAttrs (oldAttrs: { name = "${pkgs.python3.name}-artiq-env-${artiq.version}"; });
openocd = callPackage ./pkgs/openocd.nix { };
};
@ -77,6 +74,14 @@ let
inherit (pythonDeps.qasync) version src;
};
};
conda-pyqtgraph = import ./conda/build.nix { inherit pkgs; } {
pname = "conda-pyqtgraph";
inherit (pythonDeps.pyqtgraph) version;
src = import ./conda/fake-source.nix { inherit pkgs; } {
name = "pyqtgraph";
inherit (pythonDeps.pyqtgraph) version src;
};
};
conda-bscan-spi-bitstreams = import ./conda/bscan-spi-bitstreams.nix {
inherit pkgs;
bscan_spi_bitstreams = "${mainPackages.openocd}/share/bscan-spi-bitstreams";
@ -93,13 +98,7 @@ let
};
};
condaLinux = if artiq7 then ({
# ARTIQ-7 uses upstream conda-forge packages except llvmlite
conda-llvmlite = import ./conda/llvmlite-patched.nix {
inherit pkgs;
inherit (mainPackages.llvmlite-llvm11) src;
};
}) else (rec {
condaLinux = rec {
conda-binutils-or1k = import ./conda/binutils.nix {
inherit pkgs;
inherit (mainPackages.binutils-or1k) version src;
@ -119,9 +118,9 @@ let
inherit pkgs conda-llvm-or1k;
inherit (mainPackages.llvmlite-artiq) version src;
};
});
};
condaWindows5 = {
condaWindowsLegacy = {
conda-windows-binutils-or1k = import ./conda-windows/redistribute.nix {
inherit pkgs;
name = "binutils-or1k";
@ -145,7 +144,7 @@ let
};
};
condaWindows6 = rec {
condaWindowsExperimental = rec {
conda-windows-binutils-or1k = import ./conda-windows/binutils.nix {
inherit pkgs;
inherit (mainPackages.binutils-or1k) version src;
@ -167,6 +166,6 @@ let
};
};
condaWindows = if artiq6 then (if artiq7 then {} else condaWindows6) else condaWindows5;
condaWindows = if artiq6 then condaWindowsExperimental else condaWindowsLegacy;
in
boardPackages // mainPackages // condaNoarch // condaLinux // condaWindows

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@ -1,6 +1,4 @@
{ stdenv, lib, pythonDeps, fetchgit, git, python3Packages, qt5, libartiq-support, lit, outputcheck, fontconfig,
binutils-or1k, binutils-arm, llvm-or1k, llvmlite-artiq,
llvm_11, lld_11, llvmlite-llvm11 }:
{ stdenv, lib, pythonDeps, fetchgit, git, python3Packages, qt5, binutils-or1k, binutils-arm, llvm-or1k, llvmlite-artiq, libartiq-support, lit, outputcheck, fontconfig }:
python3Packages.buildPythonPackage rec {
pname = "artiq";
@ -10,12 +8,10 @@ python3Packages.buildPythonPackage rec {
preBuild = "export VERSIONEER_OVERRIDE=${version}";
nativeBuildInputs = [ qt5.wrapQtAppsHook ];
propagatedBuildInputs = [ ]
++ (lib.lists.optionals (!lib.strings.versionAtLeast version "7.0") [ binutils-or1k llvm-or1k llvmlite-artiq ])
++ (lib.lists.optionals (lib.strings.versionAtLeast version "7.0") [ llvm_11 lld_11 llvmlite-llvm11 ])
++ (lib.lists.optionals (lib.strings.versionAtLeast version "6.0" && !lib.strings.versionAtLeast version "7.0") [ binutils-arm ])
++ (with pythonDeps; [ sipyco pythonparser ])
++ (with python3Packages; [ pygit2 numpy dateutil scipy prettytable pyserial python-Levenshtein h5py pyqt5 pyqtgraph ])
propagatedBuildInputs = [ binutils-or1k llvm-or1k llvmlite-artiq ]
++ (lib.lists.optionals (lib.strings.versionAtLeast version "6.0") [ binutils-arm ])
++ (with pythonDeps; [ sipyco pythonparser pyqtgraph])
++ (with python3Packages; [ pygit2 numpy dateutil scipy prettytable pyserial python-Levenshtein h5py pyqt5 ])
++ [(if (lib.strings.versionAtLeast version "6.0") then pythonDeps.qasync else python3Packages.quamash)];
dontWrapQtApps = true;
@ -32,14 +28,14 @@ python3Packages.buildPythonPackage rec {
"--set FONTCONFIG_FILE ${fontconfig.out}/etc/fonts/fonts.conf"
];
checkInputs = [ lit outputcheck ] ++ (if (lib.strings.versionAtLeast version "7.0") then [ lld_11 llvm_11 ] else [ binutils-or1k ]);
checkInputs = [ binutils-or1k outputcheck ];
checkPhase =
''
python -m unittest discover -v artiq.test
TESTDIR=`mktemp -d`
cp --no-preserve=mode,ownership -R $src/artiq/test/lit $TESTDIR
LIBARTIQ_SUPPORT=${libartiq-support}/libartiq_support.so lit -v $TESTDIR/lit
cp --no-preserve=mode,ownership -R ${src}/artiq/test/lit $TESTDIR
LIBARTIQ_SUPPORT=${libartiq-support}/libartiq_support.so ${lit}/bin/lit -v $TESTDIR/lit
'';

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@ -14,6 +14,13 @@ rec {
propagatedBuildInputs = with python3Packages; [ numpy ];
};
artiq_tools = python3Packages.buildPythonPackage rec {
pname = "artiq_tools";
version = "0.2";
src = /home/thomp/scratch/artiq_tools;
propagatedBuildInputs = with python3Packages; [ numpy typing ];
};
asyncserial = python3Packages.buildPythonPackage rec {
pname = "asyncserial";
version = "0.1";
@ -57,6 +64,20 @@ rec {
'';
};
pyqtgraph = python3Packages.buildPythonPackage rec {
pname = "pyqtgraph";
version = "0.12.3";
src = fetchFromGitHub {
rev = "123717df28ee91c0472ce939175c1b14bc1e4364";
owner = "jkthompsonlab";
repo = "pyqtgraph";
sha256 = "sha256-8RO2rl0/isS2/Ad5oAcuvaabg/wSoXGsL3PJdmGCfk4=";
};
propagatedBuildInputs = with python3Packages; [ numpy setuptools ];
doCheck = false;
};
# Development/firmware dependencies
artiq-netboot = python3Packages.buildPythonPackage rec {
pname = "artiq-netboot";
@ -71,14 +92,14 @@ rec {
misoc = python3Packages.buildPythonPackage {
pname = "misoc";
version = if misoc-new then "unstable-2021-10-10" else "unstable-2021-02-15";
version = if misoc-new then "unstable-2021-09-10" else "unstable-2021-02-15";
src = if misoc-new
then (fetchFromGitHub {
owner = "m-labs";
repo = "misoc";
rev = "f5203e406520874e15ab5d070058ef642fc57fd9";
sha256 = "sha256-/2XTejqj0Bo81HaTrlTSWwInnWwsuqnq+CURXbpIrkA=";
rev = "c9572e777febf7abcfbebf624e0323d82600f267";
sha256 = "sha256-dal999XLFvS8Ol1hZnQjx7q/UfAXkzSMhAWcZKCDPx4=";
fetchSubmodules = true;
})
else (fetchFromGitHub {
@ -104,13 +125,13 @@ rec {
migen = python3Packages.buildPythonPackage rec {
pname = "migen";
version = "unstable-2021-12-16";
version = "unstable-2021-08-10";
src = fetchFromGitHub {
owner = "m-labs";
repo = "migen";
rev = "ac703010eaa06ac9b6e32f97c6fa98b15de22b31";
sha256 = "sha256-qpVj/yJf4hDDc99XXpVPH4EbLC8aCmEtACn5qNc3DGI=";
rev = "27dbf03edd75c32dc1706e2a1316950c3a8d452a";
sha256 = "0c7c7bbc05cb8xvxd612cxr7mvsxhaim0apfh7ax32wi9ykpl1ad";
};
propagatedBuildInputs = with python3Packages; [ colorama ];
@ -213,13 +234,13 @@ rec {
migen-axi = python3Packages.buildPythonPackage {
pname = "migen-axi";
version = "unstable-2021-09-15";
version = "unstable-2021-08-23";
src = fetchFromGitHub {
owner = "peteut";
repo = "migen-axi";
rev = "9763505ee96acd7572280a2d1233721342dc7c3f";
sha256 = "15c7g05n183rka66fl1glzp6h7xjlpy1p6k8biry24dangsmxmvg";
rev = "1f94ee0fc847dad118020bfc8c6a8f26ed9958bd";
sha256 = "0bk4g8k7cng8na01p7h6llrfpjkmxsamyi1kacvk3n110l2kl93g";
};
nativeBuildInputs = [ python3Packages.pbr ];
@ -227,7 +248,7 @@ rec {
postPatch = ''
substituteInPlace requirements.txt \
--replace "jinja2==2.11.3" "jinja2"
--replace "jinja2==2.10.3" "jinja2"
substituteInPlace requirements.txt \
--replace "future==0.18.2" "future"
substituteInPlace requirements.txt \

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@ -1,21 +1,87 @@
{ pkgs ? import <nixpkgs> {}}:
with import <nixpkgs> {};
let
set-scratch-dir = ./set-scratch-dir.sh;
artiqpkgs = import ./default.nix { inherit pkgs; };
vivado = import ./vivado.nix { inherit pkgs; };
sipyco = python3Packages.buildPythonPackage rec {
pname = "sipyco";
version = "0.1";
src = /home/thomp/scratch/sipyco;
propagatedBuildInputs = [ pkgs.python3Packages.statsmodels ];
doCheck = false;
};
artiq_tools = python3Packages.buildPythonPackage rec {
pname = "artiq_tools";
version = "0.2";
src = /home/thomp/scratch/artiq_tools;
propagatedBuildInputs = [ pkgs.python3Packages.numpy pkgs.python3Packages.typing artiqpkgs.artiq pkgs.python3Packages.pyzmq pkgs.python3Packages.matplotlib];
};
oitg = python3Packages.buildPythonPackage rec {
pname = "oitg";
version = "0.1";
src = /home/thomp/scratch/oitg;
propagatedBuildInputs = [ pkgs.python3Packages.statsmodels ];
doCheck = false;
};
python_library = python3Packages.buildPythonPackage rec {
pname = "python_library";
version = "0.1";
src = /home/thomp/scratch/python-library;
propagatedBuildInputs = [ pkgs.python3Packages.numpy pkgs.python3Packages.scipy pkgs.python3Packages.matplotlib ];
};
strontium_library = python3Packages.buildPythonPackage rec {
pname = "strontium_library";
version = "0.1";
src = /home/thomp/scratch/strontium-library;
propagatedBuildInputs = [ pkgs.python3Packages.numpy pkgs.python3Packages.scipy pkgs.python3Packages.matplotlib pkgs.python3Packages.influxdb];
};
ndscan = python3Packages.buildPythonPackage rec {
pname = "ndscan";
version = "0.1";
src = /home/thomp/scratch/ndscan;
propagatedBuildInputs = [ artiqpkgs.artiq oitg];
doCheck = false;
};
analysis_library = python3Packages.buildPythonPackage rec {
pname = "analysis_library";
version = "0.1";
src = /home/thomp/scratch/analysis-library;
propagatedBuildInputs = [ pkgs.python3Packages.h5py pkgs.python3Packages.matplotlib pkgs.python3Packages.scipy pkgs.python3Packages.numpy python_library strontium_library pkgs.python3Packages.uncertainties];
doCheck = false;
};
in
assert pkgs.lib.asserts.assertMsg (!pkgs.lib.strings.versionAtLeast artiqpkgs.artiq.version "7.0") "For ARTIQ 7+, use 'nix develop' on the flake instead.";
pkgs.mkShell {
buildInputs = [
vivado
sipyco
artiq_tools
analysis_library
python_library
strontium_library
ndscan
pkgs.gnumake
(pkgs.python3.withPackages(ps: (with ps; [ jinja2 jsonschema numpy paramiko ]) ++ (with artiqpkgs; [ migen microscope misoc jesd204b migen-axi artiq ])))
artiqpkgs.cargo-legacy
artiqpkgs.rustc-legacy
artiqpkgs.cargo
artiqpkgs.rustc
artiqpkgs.binutils-or1k
artiqpkgs.binutils-arm
artiqpkgs.llvm-or1k
artiqpkgs.openocd
];
shellHook = ''
source ${set-scratch-dir};
export PYTHONPATH="$scratch_dir/artiq_tools:$PYTHONPATH"
export PYTHONPATH="$scratch_dir/oitg:$PYTHONPATH"
export PYTHONPATH="$scratch_dir/analysis-library:$PYTHONPATH"
export PYTHONPATH="$scratch_dir/python-library:$PYTHONPATH"
export PYTHONPATH="$scratch_dir/strontium-library:$PYTHONPATH"
export PYTHONPATH="$scratch_dir/ndscan:$PYTHONPATH"
export PYTHONPATH="$scratch_dir/sipyco:$PYTHONPATH"
'';
TARGET_AR="or1k-linux-ar";
}

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@ -1,7 +1,7 @@
# Install Vivado in /opt and add to /etc/nixos/configuration.nix:
# nix.sandboxPaths = ["/opt"];
{ pkgs, vivadoPath ? "/opt/Xilinx/Vivado/2021.2" }:
{ pkgs, vivadoPath ? "/opt/Xilinx/Vivado/2021.1" }:
pkgs.buildFHSUserEnv {
name = "vivado";
@ -17,7 +17,7 @@ pkgs.buildFHSUserEnv {
xorg.libXext
xorg.libXtst
xorg.libXi
] ++ ( if pkgs ? libxcrypt-legacy then [ pkgs.libxcrypt-legacy ] else [])
]
);
profile = "source ${vivadoPath}/settings64.sh";
runScript = "vivado";

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@ -147,9 +147,89 @@ let
};
})
) {} ${serializedTargets};
drtio-systems = {
${pkgs.lib.optionalString use-generated ''
ap = {
master = "apmaster";
satellites = {
"1" = "apsatellite1";
"2" = "apsatellite2";
};
};
berkeley3 = {
master = "berkeley3master";
satellites = {
"1" = "berkeley3satellite";
};
};
npl3 = {
master = "npl3master";
satellites = {
"1" = "npl3satellite";
};
};
npl5 = {
master = "npl5master";
satellites = {
"1" = "npl5satellite";
};
};
ptb3 = {
master = "ptb3master";
satellites = {
"1" = "ptb3satellite";
};
};
roa1 = {
master = "roa1master";
satellites = {
"1" = "roa1satellite";
};
};
sias = {
master = "siasmaster";
satellites = {
"1" = "siassatellite";
};
};
stfc = {
master = "stfcmaster";
satellites = {
"1" = "stfcsatellite";
};
};
ubirmingham3 = {
master = "ubirmingham3master";
satellites = {
"1" = "ubirmingham3satellite";
};
};
ustc5 = {
master = "ustc5master";
satellites = {
"1" = "ustc5satellite";
};
};
''}
};
drtio-ddbs = pkgs.lib.attrsets.mapAttrs'
(system: crates: pkgs.lib.attrsets.nameValuePair ("device-db-" + system)
(pkgs.stdenv.mkDerivation {
name = "device-db-\''${system}";
buildInputs = ddbDeps;
phases = [ "buildPhase" ];
buildPhase = "
mkdir \$out
artiq_ddb_template \
\''${pkgs.lib.strings.concatStringsSep " " (pkgs.lib.attrsets.mapAttrsToList (dest: desc: "-s " + dest + " " + (src + "/\''${desc}.json")) crates.satellites) } \
\''${src}/\''${crates.master}.json -o \$out/device_db.py
mkdir \$out/nix-support
echo file device_db_template \$out/device_db.py >> \$out/nix-support/hydra-build-products
";
})) drtio-systems;
extras = import ./extras.nix { inherit pkgs; inherit (artiq-fast) sipyco asyncserial artiq; };
in
artiq-fast // artiq-targets // extras // rec {
artiq-fast // artiq-targets // drtio-ddbs // extras // rec {
conda-artiq-board-kasli-tester = conda-artiq-board {
target = "kasli";
variant = "tester";

View File

@ -37,6 +37,16 @@ let
);
in
kasli // {
artiq-board-sayma-rtm = {
target = "sayma";
variant = "rtm";
buildCommand = "python -m artiq.gateware.targets.sayma_rtm";
};
artiq-board-sayma-satellite = {
target = "sayma";
variant = "satellite";
buildCommand = "python -m artiq.gateware.targets.sayma_amc";
};
artiq-board-metlino-master = {
target = "metlino";
variant = "master";
@ -46,7 +56,13 @@ kasli // {
target = "kc705";
variant = "nist_qc2";
};
} // (pkgs.lib.optionalAttrs (pkgs.lib.strings.versionAtLeast artiqVersion "7.0") {
} // (pkgs.lib.optionalAttrs (pkgs.lib.strings.versionAtLeast artiqVersion "6.0") {
artiq-board-sayma-satellite-st = {
target = "sayma";
variant = "satellite";
buildCommand = "python -m artiq.gateware.targets.sayma_amc --jdcg-type syncdds";
};
}) // (pkgs.lib.optionalAttrs (pkgs.lib.strings.versionAtLeast artiqVersion "7.0") {
artiq-board-kc705-nist_clock_master = {
target = "kc705";
variant = "nist_clock_master";

View File

@ -15,6 +15,7 @@ in
artiq-full.novatech409b
artiq-full.thorlabs_tcube
artiq-full.artiq-board-kc705-nist_clock
artiq-full.artiq-board-kasli-oregon
ps.paramiko
ps.pandas
ps.numpy

View File

@ -241,13 +241,13 @@ in
condaOptions = { dependencies = [ "flake8" ]; };
}) // (dualPackage rec {
name = "dax";
version = "6.7";
version = "6.6";
enabled = builtins.head (builtins.splitVersion version) == builtins.head (builtins.splitVersion artiq.version);
withManual = false;
src = pkgs.fetchgit {
url = "https://gitlab.com/duke-artiq/dax.git";
rev = "v${version}";
sha256 = "0rgvqqiypqvxjzrsixn3h7dn93isqw5vc2wrmpkxhzvw9lh5ihm7";
sha256 = "1xf1snd0hsa94r8rdl17kwc5x0ig8hx29c0blpcihbh6r0j1cg7q";
};
pythonOptions = {
VERSIONEER_OVERRIDE = version;
@ -263,8 +263,8 @@ in
withManual = false;
src = pkgs.fetchgit {
url = "https://gitlab.com/duke-artiq/dax-applets.git";
rev = "0f0196b6941b0c44a33c85d8c02047ca65466463";
sha256 = "0mx6yjvprhdnkdigwns8mg6v5daqxpgbv7mf63fa76i1iv2wvak4";
rev = "3cd1aefb03208021a38fd04803f6dcff25f61e1d";
sha256 = "0kk745fc8dri0zs1db790zl0dja4ibz4cd2h85xq6j6ar1s6afwj";
};
pythonOptions = {
propagatedBuildInputs = [ artiq ]

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@ -2,6 +2,11 @@ let
pkgs = import <nixpkgs> { overlays = [ (import ./artiq-fast/mozilla-overlay.nix) ]; };
artiq-zynq = import <artiq-zynq>;
artiq-fast = import <artiq-fast> { inherit pkgs; };
zynq-rs = import artiq-zynq.zynq-rs;
# New zynq-rs versions with Kasli-SoC support have the multiboard "szl" package.
# Older versions need the SZL environment variable set to the SZL ELF to be loaded.
szlEnv = if zynq-rs ? "szl" then "${zynq-rs.szl}" else "${zynq-rs.zc706-szl}/szl.elf";
in
(
builtins.mapAttrs (key: value: pkgs.lib.hydraJob value) artiq-zynq
@ -21,9 +26,8 @@ in
zc706-hitl-tests = pkgs.lib.hydraJob (pkgs.stdenv.mkDerivation {
name = "zc706-hitl-tests";
__networked = true; # compatibility with old patched Nix
# breaks hydra, https://github.com/NixOS/hydra/issues/1216
#__impure = true; # Nix 2.8+
# requires patched Nix
__networked = true;
buildInputs = [
pkgs.netcat pkgs.openssh pkgs.rsync artiq-fast.artiq artiq-fast.artiq-netboot
@ -56,7 +60,7 @@ in
export USER=hydra
export OPENOCD_ZYNQ=${artiq-zynq.zynq-rs}/openocd
export SZL=${(import artiq-zynq.zynq-rs).zc706-szl}/szl.elf
export SZL=${szlEnv}
pushd ${<artiq-zynq>}
bash ${<artiq-zynq>}/remote_run.sh -h rpi-4 -o "$NIX_SSHOPTS" -d ${artiq-zynq.zc706-nist_qc2-jtag}
popd

View File

@ -1,29 +1,4 @@
{
"main-nac3": {
"enabled": 1,
"type": 1,
"hidden": false,
"description": "Main ARTIQ packages (with NAC3)",
"flake": "git+https://github.com/m-labs/artiq.git?ref=nac3",
"checkinterval": 300,
"schedulingshares": 10,
"enableemail": false,
"emailoverride": "",
"keepnr": 50
},
"nac3": {
"enabled": 1,
"type": 1,
"hidden": false,
"description": "Third generation ARTIQ compiler",
"flake": "git+https://git.m-labs.hk/M-Labs/nac3.git",
"checkinterval": 300,
"schedulingshares": 10,
"enableemail": false,
"emailoverride": "",
"keepnr": 50
},
"main-beta": {
"enabled": 1,
"type": 1,
@ -61,41 +36,93 @@
"keepnr": 50
},
"main": {
"nac3": {
"enabled": 1,
"type": 1,
"hidden": false,
"description": "Main ARTIQ packages (stable version)",
"flake": "git+https://github.com/m-labs/artiq.git?ref=release-7",
"description": "Third generation ARTIQ compiler",
"flake": "git+https://git.m-labs.hk/M-Labs/nac3.git",
"checkinterval": 300,
"schedulingshares": 10,
"enableemail": false,
"emailoverride": "",
"keepnr": 50
},
"extra": {
"fast": {
"enabled": 1,
"type": 1,
"hidden": false,
"description": "Additional ARTIQ packages (stable version)",
"flake": "git+https://git.m-labs.hk/m-labs/artiq-extrapkg.git?ref=release-7",
"description": "Core ARTIQ packages to build fast for CI purposes",
"nixexprinput": "nixScripts",
"nixexprpath": "artiq-fast.nix",
"checkinterval": 300,
"schedulingshares": 10,
"enableemail": false,
"emailoverride": "",
"keepnr": 50
"keepnr": 50,
"inputs": {
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.05", "emailresponsible": false },
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
"artiqSrc": { "type": "git", "value": "https://github.com/m-labs/artiq.git release-6 1", "emailresponsible": false }
}
},
"board-generated": {
"enabled": 1,
"hidden": false,
"description": "Generated code for ARTIQ boards (ARTIQ 6 only)",
"nixexprinput": "nixScripts",
"nixexprpath": "artiq-board-generated",
"checkinterval": 14400,
"schedulingshares": 1,
"enableemail": false,
"emailoverride": "",
"keepnr": 50,
"inputs": {
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.05", "emailresponsible": false },
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
"sinaraSystemsSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/sinara-systems-legacy.git master 1", "emailresponsible": false },
"artiq-fast": { "type": "sysbuild", "value": "artiq:fast:generated-nix", "emailresponsible": false }
}
},
"full": {
"enabled": 1,
"hidden": false,
"description": "Full set of ARTIQ packages",
"nixexprinput": "nixScripts",
"nixexprpath": "artiq-full.nix",
"checkinterval": 86400,
"schedulingshares": 1,
"enableemail": false,
"emailoverride": "",
"keepnr": 50,
"inputs": {
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.05", "emailresponsible": false },
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
"use-generated": { "type": "boolean", "value": "true" },
"artiq-board-generated": { "type": "sysbuild", "value": "artiq:board-generated:generated-nix", "emailresponsible": false }
}
},
"zynq": {
"enabled": 1,
"type": 1,
"hidden": false,
"description": "ARTIQ on Zynq-7000 (stable version)",
"flake": "git+https://git.m-labs.hk/m-labs/artiq-zynq.git?ref=release-7",
"description": "ARTIQ on Zynq-7000",
"nixexprinput": "nixScripts",
"nixexprpath": "artiq-zynq.nix",
"checkinterval": 300,
"schedulingshares": 10,
"schedulingshares": 1,
"enableemail": false,
"emailoverride": "",
"keepnr": 50
"keepnr": 50,
"inputs": {
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.05", "emailresponsible": false },
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
"artiq-fast": { "type": "sysbuild", "value": "artiq:fast:generated-nix", "emailresponsible": false },
"artiq-zynq": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/artiq-zynq.git release-6", "emailresponsible": false },
"gitea_repo_name": { "value": "artiq-zynq", "type": "string" },
"gitea_repo_owner": { "value": "M-Labs", "type": "string" },
"gitea_status_repo": { "value": "artiq-zynq", "type": "string" }
}
},
"fast-legacy": {
@ -112,25 +139,7 @@
"inputs": {
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.05", "emailresponsible": false },
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
"artiqSrc": { "type": "git", "value": "https://github.com/m-labs/artiq.git release-6 1", "emailresponsible": false }
}
},
"board-generated-legacy": {
"enabled": 1,
"hidden": false,
"description": "Generated code for ARTIQ boards (legacy version)",
"nixexprinput": "nixScripts",
"nixexprpath": "artiq-board-generated",
"checkinterval": 14400,
"schedulingshares": 1,
"enableemail": false,
"emailoverride": "",
"keepnr": 50,
"inputs": {
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.05", "emailresponsible": false },
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
"sinaraSystemsSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/sinara-systems-legacy.git master 1", "emailresponsible": false },
"artiq-fast": { "type": "sysbuild", "value": "artiq:fast-legacy:generated-nix", "emailresponsible": false }
"artiqSrc": { "type": "git", "value": "https://github.com/m-labs/artiq.git release-5 1", "emailresponsible": false }
}
},
"full-legacy": {
@ -147,26 +156,9 @@
"inputs": {
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.05", "emailresponsible": false },
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
"use-generated": { "type": "boolean", "value": "true" },
"artiq-board-generated": { "type": "sysbuild", "value": "artiq:board-generated-legacy:generated-nix", "emailresponsible": false }
}
},
"zynq-legacy": {
"enabled": 1,
"hidden": false,
"description": "ARTIQ on Zynq-7000 (legacy version)",
"nixexprinput": "nixScripts",
"nixexprpath": "artiq-zynq.nix",
"checkinterval": 300,
"schedulingshares": 1,
"enableemail": false,
"emailoverride": "",
"keepnr": 50,
"inputs": {
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.05", "emailresponsible": false },
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
"artiq-fast": { "type": "sysbuild", "value": "artiq:fast-legacy:generated-nix", "emailresponsible": false },
"artiq-zynq": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/artiq-zynq.git release-6", "emailresponsible": false }
"sinaraSystemsSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/sinara-systems-legacy.git master 1", "emailresponsible": false },
"use-generated": { "type": "boolean", "value": "false" },
"artiq-fast": { "type": "sysbuild", "value": "artiq:fast-legacy:generated-nix", "emailresponsible": false }
}
},
@ -182,7 +174,7 @@
"emailoverride": "",
"keepnr": 50,
"inputs": {
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.05", "emailresponsible": false },
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.11", "emailresponsible": false },
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
"urukulSrc": { "type": "git", "value": "https://github.com/quartiq/urukul.git", "emailresponsible": false },
"mirnySrc": { "type": "git", "value": "https://github.com/quartiq/mirny.git", "emailresponsible": false },

View File

@ -5,13 +5,13 @@
"description": "Third-party MCU firmware",
"nixexprinput": "nixScripts",
"nixexprpath": "mcu-contrib.nix",
"checkinterval": 7200,
"checkinterval": 300,
"schedulingshares": 10,
"enableemail": false,
"emailoverride": "",
"keepnr": 10,
"inputs": {
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-23.11", "emailresponsible": false },
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.11", "emailresponsible": false },
"mozillaOverlay": { "type": "git", "value": "https://github.com/mozilla/nixpkgs-mozilla.git", "emailresponsible": false },
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
"stabilizerSrc": { "type": "git", "value": "https://github.com/quartiq/stabilizer.git", "emailresponsible": false },

View File

@ -2,7 +2,7 @@
"web": {
"enabled": 1,
"hidden": false,
"description": "Websites",
"description": "M-Labs website",
"nixexprinput": "nixScripts",
"nixexprpath": "web.nix",
"checkinterval": 300,
@ -11,10 +11,9 @@
"emailoverride": "",
"keepnr": 10,
"inputs": {
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-23.11", "emailresponsible": false },
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.11", "emailresponsible": false },
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
"webSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/web2019.git", "emailresponsible": false },
"nmigenSrc": { "type": "git", "value": "https://gitlab.com/nmigen/nmigen.git", "emailresponsible": false }
"webSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/web2019.git", "emailresponsible": false }
}
}
}

View File

@ -8,8 +8,8 @@ let
"thumbv7em-none-eabihf"
];
rustManifest = pkgs.fetchurl {
url = "https://static.rust-lang.org/dist/2022-11-03/channel-rust-stable.toml";
sha256 = "sha256-DzNEaW724O8/B8844tt5AVHmSjSQ3cmzlU4BP90oRlY=";
url = "https://static.rust-lang.org/dist/2022-01-15/channel-rust-nightly.toml";
sha256 = "sha256-kGKh+zzI1lFEbuYxGJ1uqm+sP8A/b66f+/zDICvQtuk=";
};
rustChannelOfTargets = _channel: _date: targets:
(pkgs.lib.rustLib.fromManifestFile rustManifest {
@ -52,7 +52,6 @@ let
'';
dontFixup = true;
auditable = false;
};
in
pkgs.lib.attrsets.mapAttrs'
@ -64,7 +63,6 @@ in
cargoDepsName = "stabilizer";
src = <stabilizerSrc>;
patchPhase = ''
patch -p1 < ${./pounder-725.diff}
substituteInPlace src/net/mod.rs \
--replace "[10, 34, 16, 10];" \
"[192, 168, 1, 10];" # or other default MQTT broker address
@ -72,11 +70,15 @@ in
doCheck = false;
} // value))) {
dual-iir = {};
dual-iir-pounder_v1_0 = {
dual-iir-pounder_v1_1 = {
binaryName = "dual-iir";
extraCargoBuildArgs = "--features pounder_v1_0";
extraCargoBuildArgs = "--features pounder_v1_1";
};
lockin = {};
lockin-pounder_v1_1 = {
binaryName = "lockin";
extraCargoBuildArgs = "--features pounder_v1_1";
};
} //
{
# openMMC build system breaks if host compiler is not available, so do not use stdenvNoCC here

View File

@ -1,819 +0,0 @@
diff --git a/ad9959/src/lib.rs b/ad9959/src/lib.rs
index b15f2a5bd..4e83bcb2f 100644
--- a/ad9959/src/lib.rs
+++ b/ad9959/src/lib.rs
@@ -2,8 +2,24 @@
use bit_field::BitField;
use bitflags::bitflags;
+use core::ops::Range;
use embedded_hal::{blocking::delay::DelayUs, digital::v2::OutputPin};
+/// The minimum reference clock input frequency with REFCLK multiplier disabled.
+const MIN_REFCLK_FREQUENCY: f32 = 1e6;
+/// The minimum reference clock input frequency with REFCLK multiplier enabled.
+const MIN_MULTIPLIED_REFCLK_FREQUENCY: f32 = 10e6;
+/// The system clock frequency range with high gain configured for the internal VCO.
+const HIGH_GAIN_VCO_RANGE: Range<f32> = Range {
+ start: 255e6,
+ end: 500e6,
+};
+/// The system clock frequency range with low gain configured for the internal VCO.
+const LOW_GAIN_VCO_RANGE: Range<f32> = Range {
+ start: 100e6,
+ end: 160e6,
+};
+
/// A device driver for the AD9959 direct digital synthesis (DDS) chip.
///
/// This chip provides four independently controllable digital-to-analog output sinusoids with
@@ -216,23 +232,17 @@ impl<I: Interface> Ad9959<I> {
reference_clock_frequency: f32,
multiplier: u8,
) -> Result<f32, Error> {
+ let frequency =
+ validate_clocking(reference_clock_frequency, multiplier)?;
self.reference_clock_frequency = reference_clock_frequency;
- if multiplier != 1 && !(4..=20).contains(&multiplier) {
- return Err(Error::Bounds);
- }
-
- let frequency = multiplier as f32 * self.reference_clock_frequency;
- if frequency > 500_000_000.0f32 {
- return Err(Error::Frequency);
- }
-
// TODO: Update / disable any enabled channels?
let mut fr1: [u8; 3] = [0, 0, 0];
self.read(Register::FR1, &mut fr1)?;
fr1[0].set_bits(2..=6, multiplier);
- let vco_range = frequency > 255e6;
+ let vco_range = HIGH_GAIN_VCO_RANGE.contains(&frequency)
+ || frequency == HIGH_GAIN_VCO_RANGE.end;
fr1[0].set_bit(7, vco_range);
self.write(Register::FR1, &fr1)?;
@@ -363,9 +373,7 @@ impl<I: Interface> Ad9959<I> {
channel: Channel,
phase_turns: f32,
) -> Result<f32, Error> {
- let phase_offset: u16 =
- (phase_turns * (1 << 14) as f32) as u16 & 0x3FFFu16;
-
+ let phase_offset = phase_to_pow(phase_turns)?;
self.modify_channel(
channel,
Register::CPOW0,
@@ -511,6 +519,108 @@ impl<I: Interface> Ad9959<I> {
}
}
+/// Validate the internal system clock configuration of the chip.
+///
+/// Arguments:
+/// * `reference_clock_frequency` - The reference clock frequency provided to the AD9959 core.
+/// * `multiplier` - The frequency multiplier of the system clock. Must be 1 or 4-20.
+///
+/// Returns:
+/// The system clock frequency to be configured.
+pub fn validate_clocking(
+ reference_clock_frequency: f32,
+ multiplier: u8,
+) -> Result<f32, Error> {
+ // The REFCLK frequency must be at least 1 MHz with REFCLK multiplier disabled.
+ if reference_clock_frequency < MIN_REFCLK_FREQUENCY {
+ return Err(Error::Bounds);
+ }
+ // If the REFCLK multiplier is enabled, the multiplier (FR1[22:18]) must be between 4 to 20.
+ // Alternatively, the clock multiplier can be disabled. The multiplication factor is 1.
+ if multiplier != 1 && !(4..=20).contains(&multiplier) {
+ return Err(Error::Bounds);
+ }
+ // If the REFCLK multiplier is enabled, the REFCLK frequency must be at least 10 MHz.
+ if multiplier != 1
+ && reference_clock_frequency < MIN_MULTIPLIED_REFCLK_FREQUENCY
+ {
+ return Err(Error::Bounds);
+ }
+ let frequency = multiplier as f32 * reference_clock_frequency;
+ // SYSCLK frequency between 255 MHz and 500 MHz (inclusive) is valid with high range VCO
+ if HIGH_GAIN_VCO_RANGE.contains(&frequency)
+ || frequency == HIGH_GAIN_VCO_RANGE.end
+ {
+ return Ok(frequency);
+ }
+
+ // SYSCLK frequency between 100 MHz and 160 MHz (inclusive) is valid with low range VCO
+ if LOW_GAIN_VCO_RANGE.contains(&frequency)
+ || frequency == LOW_GAIN_VCO_RANGE.end
+ {
+ return Ok(frequency);
+ }
+
+ // When the REFCLK multiplier is disabled, SYSCLK frequency can go below 100 MHz
+ if multiplier == 1 && (0.0..=LOW_GAIN_VCO_RANGE.start).contains(&frequency)
+ {
+ return Ok(frequency);
+ }
+
+ Err(Error::Frequency)
+}
+
+/// Convert and validate frequency into frequency tuning word.
+///
+/// Arguments:
+/// * `dds_frequency` - The DDS frequency to be converted and validated.
+/// * `system_clock_frequency` - The system clock frequency of the AD9959 core.
+///
+/// Returns:
+/// The corresponding frequency tuning word.
+pub fn frequency_to_ftw(
+ dds_frequency: f32,
+ system_clock_frequency: f32,
+) -> Result<u32, Error> {
+ // Output frequency should not exceed the Nyquist's frequency.
+ if !(0.0..=(system_clock_frequency / 2.0)).contains(&dds_frequency) {
+ return Err(Error::Bounds);
+ }
+ // The function for channel frequency is `f_out = FTW * f_s / 2^32`, where FTW is the
+ // frequency tuning word and f_s is the system clock rate.
+ Ok(((dds_frequency / system_clock_frequency) * (1u64 << 32) as f32) as u32)
+}
+
+/// Convert phase into phase offset word.
+///
+/// Arguments:
+/// * `phase_turns` - The normalized number of phase turns of a DDS channel.
+///
+/// Returns:
+/// The corresponding phase offset word.
+pub fn phase_to_pow(phase_turns: f32) -> Result<u16, Error> {
+ Ok((phase_turns * (1 << 14) as f32) as u16 & 0x3FFFu16)
+}
+
+/// Convert amplitude into amplitude control register values.
+///
+/// Arguments:
+/// * `amplitude` - The normalized amplitude of a DDS channel.
+///
+/// Returns:
+/// The corresponding value in the amplitude control register.
+pub fn amplitude_to_acr(amplitude: f32) -> Result<u32, Error> {
+ if !(0.0..=1.0).contains(&amplitude) {
+ return Err(Error::Bounds);
+ }
+
+ let acr: u32 = *0u32
+ .set_bits(0..=9, ((amplitude * (1 << 10) as f32) as u32) & 0x3FF)
+ .set_bit(12, amplitude != 1.0);
+
+ Ok(acr as u32)
+}
+
/// Represents a means of serializing a DDS profile for writing to a stream.
pub struct ProfileSerializer {
// heapless::Vec<u8, 32>, especially its extend_from_slice() is slow
@@ -566,6 +676,39 @@ impl ProfileSerializer {
}
}
+ /// Update the system clock configuration.
+ ///
+ /// # Args
+ /// * `reference_clock_frequency` - The reference clock frequency provided to the AD9959 core.
+ /// * `multiplier` - The frequency multiplier of the system clock. Must be 1 or 4-20.
+ ///
+ /// # Limitations
+ /// The correctness of the FR1 register setting code rely on FR1\[0:17\] staying 0.
+ pub fn set_system_clock(
+ &mut self,
+ reference_clock_frequency: f32,
+ multiplier: u8,
+ ) -> Result<f32, Error> {
+ let frequency = reference_clock_frequency * multiplier as f32;
+
+ // The enabled channel will be updated after clock reconfig
+ let mut fr1 = [0u8; 3];
+
+ // The ad9959 crate does not modify FR1[0:17]. These bits keep their default value.
+ // These bits by default are 0.
+ // Reading the register then update is not possible to implement in a serializer, where
+ // many QSPI writes are performed in burst. Switching between read and write requires
+ // breaking the QSPI indirect write mode and switch into the QSPI indirect read mode.
+ fr1[0].set_bits(2..=6, multiplier);
+
+ // Frequencies within the VCO forbidden range (160e6, 255e6) are already rejected.
+ let vco_range = HIGH_GAIN_VCO_RANGE.contains(&frequency);
+ fr1[0].set_bit(7, vco_range);
+
+ self.add_write(Register::FR1, &fr1);
+ Ok(frequency)
+ }
+
/// Add a register write to the serialization data.
fn add_write(&mut self, register: Register, value: &[u8]) {
let data = &mut self.data[self.index..];
diff --git a/src/bin/dual-iir.rs b/src/bin/dual-iir.rs
index c7df3f603..dadd0523c 100644
--- a/src/bin/dual-iir.rs
+++ b/src/bin/dual-iir.rs
@@ -44,6 +44,8 @@ use stabilizer::{
afe::Gain,
dac::{Dac0Output, Dac1Output, DacCode},
hal,
+ pounder::{ClockConfig, PounderConfig},
+ setup::PounderDevices as Pounder,
signal_generator::{self, SignalGenerator},
timers::SamplingTimer,
DigitalInput0, DigitalInput1, SystemTimer, Systick, AFE0, AFE1,
@@ -145,6 +147,16 @@ pub struct Settings {
/// See [signal_generator::BasicConfig#miniconf]
#[miniconf(defer)]
signal_generator: miniconf::Array<signal_generator::BasicConfig, 2>,
+
+ /// Specifies the config for pounder DDS clock configuration, DDS channels & attenuations
+ ///
+ /// # Path
+ /// `pounder`
+ ///
+ /// # Value
+ /// See [PounderConfig#miniconf]
+ #[miniconf(defer)]
+ pounder: miniconf::Option<PounderConfig>,
}
impl Default for Settings {
@@ -171,6 +183,8 @@ impl Default for Settings {
.into(),
stream_target: StreamTarget::default(),
+
+ pounder: None.into(),
}
}
}
@@ -189,6 +203,7 @@ mod app {
settings: Settings,
telemetry: TelemetryBuffer,
signal_generator: [SignalGenerator; 2],
+ pounder: Option<Pounder>,
}
#[local]
@@ -199,6 +214,7 @@ mod app {
adcs: (Adc0Input, Adc1Input),
dacs: (Dac0Output, Dac1Output),
iir_state: [[iir::Vec5<f32>; IIR_CASCADE_LENGTH]; 2],
+ dds_clock_state: Option<ClockConfig>,
generator: FrameGenerator,
cpu_temp_sensor: stabilizer::hardware::cpu_temp_sensor::CpuTempSensor,
}
@@ -208,7 +224,7 @@ mod app {
let clock = SystemTimer::new(|| monotonics::now().ticks() as u32);
// Configure the microcontroller
- let (stabilizer, _pounder) = hardware::setup::setup(
+ let (stabilizer, pounder) = hardware::setup::setup(
c.core,
c.device,
clock,
@@ -216,6 +232,13 @@ mod app {
SAMPLE_TICKS,
);
+ let dds_clock_state = pounder.as_ref().map(|_| ClockConfig::default());
+
+ let mut settings = Settings::default();
+ if pounder.is_some() {
+ settings.pounder.replace(PounderConfig::default());
+ }
+
let mut network = NetworkUsers::new(
stabilizer.net.stack,
stabilizer.net.phy,
@@ -226,13 +249,12 @@ mod app {
.unwrap_or("10.34.16.1")
.parse()
.unwrap(),
+ settings,
);
let generator = network
.configure_streaming(StreamFormat::AdcDacData, BATCH_SIZE as _);
- let settings = Settings::default();
-
let shared = Shared {
network,
settings,
@@ -249,6 +271,7 @@ mod app {
.unwrap(),
),
],
+ pounder,
};
let mut local = Local {
@@ -258,6 +281,7 @@ mod app {
adcs: stabilizer.adcs,
dacs: stabilizer.dacs,
iir_state: [[[0.; 5]; IIR_CASCADE_LENGTH]; 2],
+ dds_clock_state,
generator,
cpu_temp_sensor: stabilizer.temperature_sensor,
};
@@ -407,7 +431,7 @@ mod app {
}
}
- #[task(priority = 1, local=[afes], shared=[network, settings, signal_generator])]
+ #[task(priority = 1, local=[afes, dds_clock_state], shared=[network, settings, signal_generator, pounder])]
fn settings_update(mut c: settings_update::Context) {
let settings = c.shared.network.lock(|net| *net.miniconf.settings());
c.shared.settings.lock(|current| *current = settings);
@@ -431,15 +455,28 @@ mod app {
}
}
+ // Update Pounder configurations
+ c.shared.pounder.lock(|pounder| {
+ if let Some(pounder) = pounder {
+ let pounder_settings = settings.pounder.as_ref().unwrap();
+ let mut clocking = c.local.dds_clock_state.unwrap();
+ pounder.update_dds(*pounder_settings, &mut clocking);
+ }
+ });
+
let target = settings.stream_target.into();
c.shared.network.lock(|net| net.direct_stream(target));
}
- #[task(priority = 1, shared=[network, settings, telemetry], local=[cpu_temp_sensor])]
+ #[task(priority = 1, shared=[network, settings, telemetry, pounder], local=[cpu_temp_sensor])]
fn telemetry(mut c: telemetry::Context) {
let telemetry: TelemetryBuffer =
c.shared.telemetry.lock(|telemetry| *telemetry);
+ let pounder_telemetry = c.shared.pounder.lock(|pounder| {
+ pounder.as_mut().map(|pounder| pounder.get_telemetry())
+ });
+
let (gains, telemetry_period) = c
.shared
.settings
@@ -450,6 +487,7 @@ mod app {
gains[0],
gains[1],
c.local.cpu_temp_sensor.get_temperature().unwrap(),
+ pounder_telemetry,
))
});
diff --git a/src/bin/lockin.rs b/src/bin/lockin.rs
index 6896df7ff..1e92a0f75 100644
--- a/src/bin/lockin.rs
+++ b/src/bin/lockin.rs
@@ -254,6 +254,8 @@ mod app {
SAMPLE_TICKS,
);
+ let settings = Settings::default();
+
let mut network = NetworkUsers::new(
stabilizer.net.stack,
stabilizer.net.phy,
@@ -264,6 +266,7 @@ mod app {
.unwrap_or("10.34.16.1")
.parse()
.unwrap(),
+ settings,
);
let generator = network
@@ -272,7 +275,7 @@ mod app {
let shared = Shared {
network,
telemetry: TelemetryBuffer::default(),
- settings: Settings::default(),
+ settings,
};
let signal_config = signal_generator::Config {
@@ -499,6 +502,7 @@ mod app {
gains[0],
gains[1],
c.local.cpu_temp_sensor.get_temperature().unwrap(),
+ None,
))
});
diff --git a/src/hardware/pounder/attenuators.rs b/src/hardware/pounder/attenuators.rs
index ef22814d4..a5d220dfb 100644
--- a/src/hardware/pounder/attenuators.rs
+++ b/src/hardware/pounder/attenuators.rs
@@ -54,10 +54,9 @@ pub trait AttenuatorInterface {
fn get_attenuation(&mut self, channel: Channel) -> Result<f32, Error> {
let mut channels = [0_u8; 4];
- // Reading the data always shifts data out of the staging registers, so we perform a
- // duplicate write-back to ensure the staging register is always equal to the output
- // register.
- self.transfer_attenuators(&mut channels)?;
+ // Reading the data always shifts data out of the staging registers, so a duplicate
+ // write-back will be performed to ensure the staging register is always equal to the
+ // output register.
self.transfer_attenuators(&mut channels)?;
// The attenuation code is stored in the upper 6 bits of the register, where each LSB
@@ -68,6 +67,9 @@ pub trait AttenuatorInterface {
// care) would contain erroneous data.
let attenuation_code = (!channels[channel as usize]) >> 2;
+ // The write-back transfer is performed. Staging register is now restored.
+ self.transfer_attenuators(&mut channels)?;
+
// Convert the desired channel code into dB of attenuation.
Ok(attenuation_code as f32 / 2.0)
}
diff --git a/src/hardware/pounder/dds_output.rs b/src/hardware/pounder/dds_output.rs
index 9af23a9aa..559855fcc 100644
--- a/src/hardware/pounder/dds_output.rs
+++ b/src/hardware/pounder/dds_output.rs
@@ -55,7 +55,7 @@
use log::warn;
use stm32h7xx_hal as hal;
-use super::{hrtimer::HighResTimerE, QspiInterface};
+use super::{hrtimer::HighResTimerE, Profile, QspiInterface};
use ad9959::{Channel, Mode, ProfileSerializer};
/// The DDS profile update stream.
@@ -157,6 +157,46 @@ impl<'a> ProfileBuilder<'a> {
self
}
+ /// Update a number of channels with fully defined profile settings.
+ ///
+ /// # Args
+ /// * `channels` - A set of channels to apply the configuration to.
+ /// * `profile` - The complete DDS profile, which defines the frequency tuning word,
+ /// amplitude control register & the phase offset word of the channels.
+ /// # Note
+ /// The ACR should be stored in the 3 LSB of the word.
+ /// If amplitude scaling is to be used, the "Amplitude multiplier enable" bit must be set.
+ #[inline]
+ pub fn update_channels_with_profile(
+ &mut self,
+ channels: Channel,
+ profile: Profile,
+ ) -> &mut Self {
+ self.serializer.update_channels(
+ channels,
+ Some(profile.frequency_tuning_word),
+ Some(profile.phase_offset),
+ Some(profile.amplitude_control),
+ );
+ self
+ }
+
+ /// Update the system clock configuration.
+ ///
+ /// # Args
+ /// * `reference_clock_frequency` - The reference clock frequency provided to the AD9959 core.
+ /// * `multiplier` - The frequency multiplier of the system clock. Must be 1 or 4-20.
+ #[inline]
+ pub fn set_system_clock(
+ &mut self,
+ reference_clock_frequency: f32,
+ multiplier: u8,
+ ) -> Result<&mut Self, ad9959::Error> {
+ self.serializer
+ .set_system_clock(reference_clock_frequency, multiplier)?;
+ Ok(self)
+ }
+
/// Write the profile to the DDS asynchronously.
#[allow(dead_code)]
#[inline]
diff --git a/src/hardware/pounder/mod.rs b/src/hardware/pounder/mod.rs
index d6dd654fc..1e436f785 100644
--- a/src/hardware/pounder/mod.rs
+++ b/src/hardware/pounder/mod.rs
@@ -1,10 +1,17 @@
use self::attenuators::AttenuatorInterface;
use super::hal;
-use crate::hardware::{shared_adc::AdcChannel, I2c1Proxy};
+use crate::hardware::{setup, shared_adc::AdcChannel, I2c1Proxy};
+use crate::net::telemetry::PounderTelemetry;
+use ad9959::{
+ amplitude_to_acr, frequency_to_ftw, phase_to_pow, validate_clocking,
+};
use embedded_hal::blocking::spi::Transfer;
use enum_iterator::Sequence;
+use miniconf::Miniconf;
+use rf_power::PowerMeasurementInterface;
use serde::{Deserialize, Serialize};
+use stm32h7xx_hal::time::MegaHertz;
pub mod attenuators;
pub mod dds_output;
@@ -91,40 +98,98 @@ impl From<Channel> for GpioPin {
}
}
-#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
-pub struct DdsChannelState {
- pub phase_offset: f32,
+#[derive(Serialize, Deserialize, Copy, Clone, Debug, Miniconf)]
+pub struct DdsChannelConfig {
pub frequency: f32,
+ pub phase_offset: f32,
pub amplitude: f32,
- pub enabled: bool,
}
-#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
-pub struct ChannelState {
- pub parameters: DdsChannelState,
- pub attenuation: f32,
+impl Default for DdsChannelConfig {
+ fn default() -> Self {
+ Self {
+ frequency: 0.0,
+ phase_offset: 0.0,
+ amplitude: 0.0,
+ }
+ }
}
-#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
-pub struct InputChannelState {
- pub attenuation: f32,
- pub power: f32,
- pub mixer: DdsChannelState,
+/// Represents a fully defined DDS profile, with parameters expressed in machine units
+pub struct Profile {
+ /// A 32-bits representation of DDS frequency in relation to the system clock frequency.
+ /// This value corresponds to the AD9959 CFTW0 register, which specifies the frequency
+ /// of DDS channels.
+ pub frequency_tuning_word: u32,
+ /// The DDS phase offset. It corresponds to the AD9959 CPOW0 register, which specifies
+ /// the phase offset of DDS channels.
+ pub phase_offset: u16,
+ /// Control amplitudes of DDS channels. It corresponds to the AD9959 ACR register, which
+ /// controls the amplitude scaling factor of DDS channels.
+ pub amplitude_control: u32,
+}
+
+impl TryFrom<(ClockConfig, ChannelConfig)> for Profile {
+ type Error = ad9959::Error;
+
+ fn try_from(
+ (clocking, channel): (ClockConfig, ChannelConfig),
+ ) -> Result<Self, Self::Error> {
+ let system_clock_frequency =
+ clocking.reference_clock * clocking.multiplier as f32;
+ Ok(Profile {
+ frequency_tuning_word: frequency_to_ftw(
+ channel.dds.frequency,
+ system_clock_frequency,
+ )?,
+ phase_offset: phase_to_pow(channel.dds.phase_offset)?,
+ amplitude_control: amplitude_to_acr(channel.dds.amplitude)?,
+ })
+ }
}
-#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
-pub struct OutputChannelState {
+#[derive(Serialize, Deserialize, Copy, Clone, Debug, Miniconf)]
+pub struct ChannelConfig {
+ #[miniconf(defer)]
+ pub dds: DdsChannelConfig,
pub attenuation: f32,
- pub channel: DdsChannelState,
}
-#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
-pub struct DdsClockConfig {
+impl Default for ChannelConfig {
+ fn default() -> Self {
+ ChannelConfig {
+ dds: DdsChannelConfig::default(),
+ attenuation: 31.5,
+ }
+ }
+}
+
+#[derive(Serialize, Deserialize, Copy, Clone, Debug, PartialEq, Miniconf)]
+pub struct ClockConfig {
pub multiplier: u8,
pub reference_clock: f32,
pub external_clock: bool,
}
+impl Default for ClockConfig {
+ fn default() -> Self {
+ Self {
+ multiplier: 5,
+ reference_clock: MegaHertz::MHz(100).to_Hz() as f32,
+ external_clock: false,
+ }
+ }
+}
+
+#[derive(Copy, Clone, Debug, Default, Miniconf)]
+pub struct PounderConfig {
+ pub clock: ClockConfig,
+ #[miniconf(defer)]
+ pub in_channel: miniconf::Array<ChannelConfig, 2>,
+ #[miniconf(defer)]
+ pub out_channel: miniconf::Array<ChannelConfig, 2>,
+}
+
impl From<Channel> for ad9959::Channel {
/// Translate pounder channels to DDS output channels.
fn from(other: Channel) -> Self {
@@ -489,3 +554,77 @@ impl rf_power::PowerMeasurementInterface for PounderDevices {
Ok(adc_scale * 2.048)
}
}
+
+impl setup::PounderDevices {
+ pub fn update_dds(
+ &mut self,
+ settings: PounderConfig,
+ clocking: &mut ClockConfig,
+ ) {
+ if *clocking != settings.clock {
+ match validate_clocking(
+ settings.clock.reference_clock,
+ settings.clock.multiplier,
+ ) {
+ Ok(_frequency) => {
+ self.pounder
+ .set_ext_clk(settings.clock.external_clock)
+ .unwrap();
+
+ self.dds_output
+ .builder()
+ .set_system_clock(
+ settings.clock.reference_clock,
+ settings.clock.multiplier,
+ )
+ .unwrap()
+ .write();
+
+ *clocking = settings.clock;
+ }
+ Err(err) => {
+ log::error!("Invalid AD9959 clocking parameters: {:?}", err)
+ }
+ }
+ }
+
+ for (channel_config, pounder_channel) in settings
+ .in_channel
+ .iter()
+ .chain(settings.out_channel.iter())
+ .zip([Channel::In0, Channel::In1, Channel::Out0, Channel::Out1])
+ {
+ match Profile::try_from((*clocking, *channel_config)) {
+ Ok(dds_profile) => {
+ self.dds_output
+ .builder()
+ .update_channels_with_profile(
+ pounder_channel.into(),
+ dds_profile,
+ )
+ .write();
+
+ if let Err(err) = self.pounder.set_attenuation(
+ pounder_channel,
+ channel_config.attenuation,
+ ) {
+ log::error!("Invalid attenuation settings: {:?}", err)
+ }
+ }
+ Err(err) => {
+ log::error!("Invalid AD9959 profile settings: {:?}", err)
+ }
+ }
+ }
+ }
+
+ pub fn get_telemetry(&mut self) -> PounderTelemetry {
+ PounderTelemetry {
+ temperature: self.pounder.lm75.read_temperature().unwrap(),
+ input_power: [
+ self.pounder.measure_power(Channel::In0).unwrap(),
+ self.pounder.measure_power(Channel::In1).unwrap(),
+ ],
+ }
+ }
+}
diff --git a/src/net/mod.rs b/src/net/mod.rs
index f6372381b..9a88008f7 100644
--- a/src/net/mod.rs
+++ b/src/net/mod.rs
@@ -43,7 +43,7 @@ pub enum NetworkState {
}
/// A structure of Stabilizer's default network users.
-pub struct NetworkUsers<S: Default + Miniconf + Clone, T: Serialize> {
+pub struct NetworkUsers<S: Miniconf + Clone, T: Serialize> {
pub miniconf: miniconf::MqttClient<S, NetworkReference, SystemTimer, 512>,
pub processor: NetworkProcessor,
stream: DataStream,
@@ -53,7 +53,7 @@ pub struct NetworkUsers<S: Default + Miniconf + Clone, T: Serialize> {
impl<S, T> NetworkUsers<S, T>
where
- S: Default + Miniconf + Clone,
+ S: Miniconf + Clone,
T: Serialize,
{
/// Construct Stabilizer's default network users.
@@ -65,6 +65,7 @@ where
/// * `app` - The name of the application.
/// * `mac` - The MAC address of the network.
/// * `broker` - The IP address of the MQTT broker to use.
+ /// * `settings` - The initial settings value
///
/// # Returns
/// A new struct of network users.
@@ -75,6 +76,7 @@ where
app: &str,
mac: smoltcp_nal::smoltcp::wire::EthernetAddress,
broker: IpAddr,
+ settings: S,
) -> Self {
let stack_manager =
cortex_m::singleton!(: NetworkManager = NetworkManager::new(stack))
@@ -91,7 +93,7 @@ where
&prefix,
broker,
clock,
- S::default(),
+ settings,
)
.unwrap();
diff --git a/src/net/telemetry.rs b/src/net/telemetry.rs
index c6e071f17..e35347037 100644
--- a/src/net/telemetry.rs
+++ b/src/net/telemetry.rs
@@ -58,6 +58,23 @@ pub struct Telemetry {
/// The CPU temperature in degrees Celsius.
pub cpu_temp: f32,
+
+ /// Measurements related to Pounder
+ pub pounder: Option<PounderTelemetry>,
+}
+
+/// The structure that holds the telemetry related to Pounder.
+///
+/// # Note
+/// This structure should be generated on-demand by the buffer when required to minimize conversion
+/// overhead.
+#[derive(Copy, Clone, Serialize)]
+pub struct PounderTelemetry {
+ /// The Pounder temperature in degrees Celsius
+ pub temperature: f32,
+
+ /// The detected RF power into IN channels
+ pub input_power: [f32; 2],
}
impl Default for TelemetryBuffer {
@@ -77,10 +94,17 @@ impl TelemetryBuffer {
/// * `afe0` - The current AFE configuration for channel 0.
/// * `afe1` - The current AFE configuration for channel 1.
/// * `cpu_temp` - The current CPU temperature.
+ /// * `pounder` - The current Pounder telemetry.
///
/// # Returns
/// The finalized telemetry structure that can be serialized and reported.
- pub fn finalize(self, afe0: Gain, afe1: Gain, cpu_temp: f32) -> Telemetry {
+ pub fn finalize(
+ self,
+ afe0: Gain,
+ afe1: Gain,
+ cpu_temp: f32,
+ pounder: Option<PounderTelemetry>,
+ ) -> Telemetry {
let in0_volts = Into::<f32>::into(self.adcs[0]) / afe0.as_multiplier();
let in1_volts = Into::<f32>::into(self.adcs[1]) / afe1.as_multiplier();
@@ -89,6 +113,7 @@ impl TelemetryBuffer {
adcs: [in0_volts, in1_volts],
dacs: [self.dacs[0].into(), self.dacs[1].into()],
digital_inputs: self.digital_inputs,
+ pounder,
}
}
}

29
web.nix
View File

@ -1,30 +1,7 @@
let
pkgs = import <nixpkgs> {};
web-src = <webSrc>;
nmigen-src = <nmigenSrc>;
src = <webSrc>;
in
rec {
web = pkgs.runCommand "web" {} "cd ${web-src}; ${pkgs.zola}/bin/zola build -o $out";
sphinxcontrib-platformpicker = pkgs.python3Packages.buildPythonPackage rec {
pname = "sphinxcontrib-platformpicker";
version = "1.3";
src = pkgs.fetchFromGitHub {
owner = "whitequark";
repo = "sphinxcontrib-platformpicker";
rev = "v${version}";
sha256 = "sha256-qKhi4QqYhU7CbNSpziFacXc/sWWPSuM3Nc/oWPmBivM=";
};
propagatedBuildInputs = [ pkgs.python3Packages.sphinx ];
};
nmigen-docs = pkgs.stdenvNoCC.mkDerivation {
name = "nmigen-docs";
src = nmigen-src;
buildInputs = [ (pkgs.python3.withPackages(ps: [ ps.sphinx ps.sphinx_rtd_theme sphinxcontrib-platformpicker ])) ];
phases = [ "buildPhase" ];
buildPhase =
''
export PYTHONPATH=$src
sphinx-build -b html $src/docs $out
'';
};
{
web = pkgs.runCommand "web" {} "cd ${src}; ${pkgs.zola}/bin/zola build -o $out";
}