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No commits in common. "master" and "master" have entirely different histories.
|
|
@ -27,7 +27,7 @@ let
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|||
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let
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sinaraSystemsSrc = pkgs.fetchgit {
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url = "https://git.m-labs.hk/M-Labs/sinara-systems-legacy.git";
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url = "https://git.m-labs.hk/M-Labs/sinara-systems.git";
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rev = "$REV";
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sha256 = "$HASH";
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};
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|
|
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@ -23,7 +23,7 @@ let
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cat > $out/pkgs/artiq-src.nix << EOF
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{ fetchgit }:
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fetchgit {
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url = "https://github.com/m-labs/artiq.git";
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url = "git://github.com/m-labs/artiq.git";
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rev = "$REV";
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sha256 = "$HASH";
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}
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@ -59,9 +59,8 @@ in
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extended-tests = pkgs.stdenv.mkDerivation {
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name = "extended-tests";
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__networked = true; # compatibility with old patched Nix
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# breaks hydra, https://github.com/NixOS/hydra/issues/1216
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#__impure = true; # Nix 2.8+
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# requires patched Nix
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__networked = true;
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buildInputs = [
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(pkgs.python3.withPackages(ps: [ ps.paramiko artiqpkgs.artiq artiqpkgs.artiq-board-kc705-nist_clock ]))
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@ -73,15 +72,15 @@ in
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''
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export HOME=`mktemp -d`
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mkdir $HOME/.ssh
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cp /opt/hydra_id_ed25519 $HOME/.ssh/id_ed25519
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cp /opt/hydra_id_ed25519.pub $HOME/.ssh/id_ed25519.pub
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echo "rpi-1 ssh-ed25519 AAAAC3NzaC1lZDI1NTE5AAAAIACtBFDVBYoAE4fpJCTANZSE0bcVpTR3uvfNvb80C4i5" > $HOME/.ssh/known_hosts
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chmod 600 $HOME/.ssh/id_ed25519
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cp /opt/hydra_id_rsa $HOME/.ssh/id_rsa
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cp /opt/hydra_id_rsa.pub $HOME/.ssh/id_rsa.pub
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echo "rpi-1 ssh-ed25519 AAAAC3NzaC1lZDI1NTE5AAAAIPOBQVcsvk6WgRj18v4m0zkFeKrcN9gA+r6sxQxNwFpv" > $HOME/.ssh/known_hosts
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chmod 600 $HOME/.ssh/id_rsa
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LOCKCTL=$(mktemp -d)
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mkfifo $LOCKCTL/lockctl
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cat $LOCKCTL/lockctl | ${pkgs.openssh}/bin/ssh \
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-i $HOME/.ssh/id_ed25519 \
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-i $HOME/.ssh/id_rsa \
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-o UserKnownHostsFile=$HOME/.ssh/known_hosts \
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rpi-1 \
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'mkdir -p /tmp/board_lock && flock /tmp/board_lock/kc705-1 -c "echo Ok; cat"' \
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|
|
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@ -47,7 +47,7 @@ let
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cargoDeps = rustPlatform.fetchCargoTarball {
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name = "artiq-firmware-cargo-deps";
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src = "${artiqSrc}/artiq/firmware";
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sha256 = "sha256-YyycMsDzR+JRcMZJd6A/CRi2J9nKmaWY/KXUnAQaZ00=";
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sha256 = "0hh9x34gs81a8g15abka6a0z1wlankra13rbap5j7ba2r8cz4962";
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};
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cargo-xbuild = rustPlatform.buildRustPackage rec {
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|
|
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@ -15,7 +15,7 @@ assert (name != null) -> pname == null && version == null;
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let
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condaBuilderEnv = import ./builder-env.nix { inherit pkgs; };
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realName = if (name != null) then name else "${pname}-${version}";
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in pkgs.stdenvNoCC.mkDerivation {
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in pkgs.stdenv.mkDerivation {
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name = realName;
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inherit src;
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buildCommand =
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|
|
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@ -3,7 +3,7 @@
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with pkgs;
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let
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condaDeps = [ zlib xorg.libSM xorg.libICE xorg.libX11 xorg.libXau xorg.libXi xorg.libXrender libselinux libGL ];
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condaDeps = [ stdenv.cc zlib xorg.libSM xorg.libICE xorg.libX11 xorg.libXau xorg.libXi xorg.libXrender libselinux libGL ];
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# Use the full Anaconda distribution, which already contains conda-build and its many dependencies,
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# so we don't have to manually deal with them.
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condaInstaller = fetchurl {
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|
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@ -43,15 +43,10 @@ let
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ln -s ${libiconv} ${libiconv-filename}
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${condaInstallerEnv}/bin/conda-installer-env -c "$out/bin/conda install ${libiconv-filename}"
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'';
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binutils-fhs = (pkgs.binutils.overrideAttrs(oa: {postFixup = oa.postFixup + "echo /lib64/ld-linux-x86-64.so.2 > $out/nix-support/dynamic-linker";}));
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gcc-fhs = (pkgs.gcc.override {bintools = binutils-fhs;} );
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in
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buildFHSUserEnv {
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name = "conda-builder-env";
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targetPkgs = pkgs: ([ condaInstalled ] ++ condaDeps ++ [
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binutils-fhs
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gcc-fhs
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# for llvm-or1k
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cmake
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]
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|
|
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|
@ -1,88 +0,0 @@
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{ pkgs, src }:
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let
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condaBuilderEnv = import ./builder-env.nix { inherit pkgs; };
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fake-src = pkgs.runCommand "conda-fake-source-llvmlite" { }
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''
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mkdir -p $out/fake-conda;
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mkdir conda-sucks
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pushd conda-sucks
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tar xvf ${src} --strip-components=1
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tar cf $out/src.tar .
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patch -p1 < ${../pkgs/llvmlite-callsite.diff}
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patch -p1 < ${../pkgs/llvmlite-abiname.diff}
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popd
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rm -rf conda-sucks
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cat << EOF > $out/fake-conda/meta.yaml
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package:
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name: llvmlite
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version: 0.99 # high version number to entice the conda filth to choose it over others
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source:
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url: ../src.tar
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# Again, we don't specify build dependencies since the conda garbage mistakenly thinks
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# that they are not there if they have been installed from files.
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requirements:
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run:
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- libllvm11
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- python<3.9
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- zlib
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EOF
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cat << EOF > $out/fake-conda/build.sh
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#!/bin/bash
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set -e
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export LD_LIBRARY_PATH=/lib
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python setup.py install \
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--prefix=\$PREFIX \
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--single-version-externally-managed \
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--record=record.txt \
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--no-compile
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EOF
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chmod 755 $out/fake-conda/build.sh
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'';
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conda-zlib = pkgs.fetchurl {
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url = "https://anaconda.org/conda-forge/zlib/1.2.11/download/linux-64/zlib-1.2.11-h36c2ea0_1013.tar.bz2";
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sha256 = "sha256-zsSNs1p97wARv9qiuR5eBdKgrXiLiHGiE+uMrP63QYo=";
|
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};
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conda-llvm = pkgs.fetchurl {
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url = "https://anaconda.org/conda-forge/llvm/11.1.0/download/linux-64/llvm-11.1.0-h32600fe_2.tar.bz2";
|
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sha256 = "sha256-E+jnVeGHad3LH+dKqFKH0/lBuQqZKtybXF44uArmNz8=";
|
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};
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conda-llvm-tools = pkgs.fetchurl {
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url = "https://anaconda.org/conda-forge/llvm-tools/11.1.0/download/linux-64/llvm-tools-11.1.0-hf817b99_2.tar.bz2";
|
||||
sha256 = "sha256-Y87krT+d9vdVIPliJVc/szIVBRA3NNcUDdY9Gc9KpXg=";
|
||||
};
|
||||
conda-llvmdev = pkgs.fetchurl {
|
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url = "https://anaconda.org/conda-forge/llvmdev/11.1.0/download/linux-64/llvmdev-11.1.0-hf817b99_2.tar.bz2";
|
||||
sha256 = "sha256-vN87BWggPfpFp51Qm60R3D5krQ4AQwiEJaqPfVb6x40=";
|
||||
};
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in
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pkgs.stdenv.mkDerivation {
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name = "conda-llvmlite";
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src = fake-src;
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buildCommand =
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''
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HOME=`pwd`
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mkdir $out
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cat << EOF > conda-commands.sh
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set -e
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conda create --prefix ./conda_tmp ${conda-zlib} ${conda-llvm} ${conda-llvm-tools} ${conda-llvmdev}
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conda init
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source .bashrc
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conda activate ./conda_tmp
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|
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conda build --no-anaconda-upload --no-test --output-folder $out $src/fake-conda
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EOF
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${condaBuilderEnv}/bin/conda-builder-env conda-commands.sh
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|
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mkdir -p $out/nix-support
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echo file conda $out/*/*.tar.bz2 >> $out/nix-support/hydra-build-products
|
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'';
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}
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|
|
@ -93,13 +93,9 @@ let
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};
|
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};
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|
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condaLinux = if artiq7 then ({
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# ARTIQ-7 uses upstream conda-forge packages except llvmlite
|
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conda-llvmlite = import ./conda/llvmlite-patched.nix {
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inherit pkgs;
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inherit (mainPackages.llvmlite-llvm11) src;
|
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};
|
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}) else (rec {
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# ARTIQ-7 uses upstream conda-forge packages
|
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|
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condaLinux = lib.optionalAttrs (!artiq7) (rec {
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conda-binutils-or1k = import ./conda/binutils.nix {
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inherit pkgs;
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inherit (mainPackages.binutils-or1k) version src;
|
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|
|
|
|||
|
|
@ -1,62 +0,0 @@
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diff --git a/ffi/targets.cpp b/ffi/targets.cpp
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index 98de259fc..1ce472c20 100644
|
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--- a/ffi/targets.cpp
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+++ b/ffi/targets.cpp
|
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@@ -182,7 +182,8 @@ LLVMPY_CreateTargetMachine(LLVMTargetRef T,
|
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const char *RelocModel,
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const char *CodeModel,
|
||||
int PrintMC,
|
||||
- int JIT)
|
||||
+ int JIT,
|
||||
+ const char *ABIName)
|
||||
{
|
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using namespace llvm;
|
||||
CodeGenOpt::Level cgol;
|
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@@ -233,6 +234,7 @@ LLVMPY_CreateTargetMachine(LLVMTargetRef T,
|
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|
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TargetOptions opt;
|
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opt.PrintMachineCode = PrintMC;
|
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+ opt.MCOptions.ABIName = ABIName;
|
||||
|
||||
bool jit = JIT;
|
||||
|
||||
diff --git a/llvmlite/binding/targets.py b/llvmlite/binding/targets.py
|
||||
index eb53f09f2..a7e6ffdc3 100644
|
||||
--- a/llvmlite/binding/targets.py
|
||||
+++ b/llvmlite/binding/targets.py
|
||||
@@ -218,7 +218,7 @@ def __str__(self):
|
||||
|
||||
def create_target_machine(self, cpu='', features='',
|
||||
opt=2, reloc='default', codemodel='jitdefault',
|
||||
- printmc=False, jit=False):
|
||||
+ printmc=False, jit=False, abiname=''):
|
||||
"""
|
||||
Create a new TargetMachine for this target and the given options.
|
||||
|
||||
@@ -230,6 +230,9 @@ def create_target_machine(self, cpu='', features='',
|
||||
|
||||
The `jit` option should be set when the target-machine is to be used
|
||||
in a JIT engine.
|
||||
+
|
||||
+ The `abiname` option specifies the ABI. RISC-V targets with hard-float
|
||||
+ needs to pass the ABI name to LLVM.
|
||||
"""
|
||||
assert 0 <= opt <= 3
|
||||
assert reloc in RELOC
|
||||
@@ -249,6 +252,7 @@ def create_target_machine(self, cpu='', features='',
|
||||
_encode_string(codemodel),
|
||||
int(printmc),
|
||||
int(jit),
|
||||
+ _encode_string(abiname),
|
||||
)
|
||||
if tm:
|
||||
return TargetMachine(tm)
|
||||
@@ -403,6 +407,8 @@ def has_svml():
|
||||
c_int,
|
||||
# JIT
|
||||
c_int,
|
||||
+ # ABIName
|
||||
+ c_char_p,
|
||||
]
|
||||
ffi.lib.LLVMPY_CreateTargetMachine.restype = ffi.LLVMTargetMachineRef
|
||||
|
||||
|
|
@ -1,185 +0,0 @@
|
|||
diff --git a/llvmlite/ir/builder.py b/llvmlite/ir/builder.py
|
||||
index f18a8d8bd..b4958770e 100644
|
||||
--- a/llvmlite/ir/builder.py
|
||||
+++ b/llvmlite/ir/builder.py
|
||||
@@ -872,14 +872,14 @@ def resume(self, landingpad):
|
||||
# Call APIs
|
||||
|
||||
def call(self, fn, args, name='', cconv=None, tail=False, fastmath=(),
|
||||
- attrs=()):
|
||||
+ attrs=(), arg_attrs=None):
|
||||
"""
|
||||
Call function *fn* with *args*:
|
||||
name = fn(args...)
|
||||
"""
|
||||
inst = instructions.CallInstr(self.block, fn, args, name=name,
|
||||
cconv=cconv, tail=tail, fastmath=fastmath,
|
||||
- attrs=attrs)
|
||||
+ attrs=attrs, arg_attrs=arg_attrs)
|
||||
self._insert(inst)
|
||||
return inst
|
||||
|
||||
@@ -908,9 +908,11 @@ def store_reg(self, value, reg_type, reg_name, name=''):
|
||||
return self.asm(ftype, "", "{%s}" % reg_name, [value], True, name)
|
||||
|
||||
def invoke(self, fn, args, normal_to, unwind_to,
|
||||
- name='', cconv=None, tail=False):
|
||||
+ name='', cconv=None, fastmath=(), attrs=(), arg_attrs=None):
|
||||
inst = instructions.InvokeInstr(self.block, fn, args, normal_to,
|
||||
- unwind_to, name=name, cconv=cconv)
|
||||
+ unwind_to, name=name, cconv=cconv,
|
||||
+ fastmath=fastmath, attrs=attrs,
|
||||
+ arg_attrs=arg_attrs)
|
||||
self._set_terminator(inst)
|
||||
return inst
|
||||
|
||||
diff --git a/llvmlite/ir/instructions.py b/llvmlite/ir/instructions.py
|
||||
index 7e82ee032..f337c1586 100644
|
||||
--- a/llvmlite/ir/instructions.py
|
||||
+++ b/llvmlite/ir/instructions.py
|
||||
@@ -5,7 +5,7 @@
|
||||
from llvmlite.ir import types
|
||||
from llvmlite.ir.values import (Block, Function, Value, NamedValue, Constant,
|
||||
MetaDataArgument, MetaDataString, AttributeSet,
|
||||
- Undefined)
|
||||
+ Undefined, ArgumentAttributes)
|
||||
from llvmlite.ir._utils import _HasMetadata
|
||||
|
||||
|
||||
@@ -63,13 +63,20 @@ class FastMathFlags(AttributeSet):
|
||||
|
||||
class CallInstr(Instruction):
|
||||
def __init__(self, parent, func, args, name='', cconv=None, tail=False,
|
||||
- fastmath=(), attrs=()):
|
||||
+ fastmath=(), attrs=(), arg_attrs=None):
|
||||
self.cconv = (func.calling_convention
|
||||
if cconv is None and isinstance(func, Function)
|
||||
else cconv)
|
||||
self.tail = tail
|
||||
self.fastmath = FastMathFlags(fastmath)
|
||||
self.attributes = CallInstrAttributes(attrs)
|
||||
+ self.arg_attributes = {}
|
||||
+ if arg_attrs:
|
||||
+ for idx, attrs in arg_attrs.items():
|
||||
+ if not (0 <= idx < len(args)):
|
||||
+ raise ValueError("Invalid argument index {}"
|
||||
+ .format(idx))
|
||||
+ self.arg_attributes[idx] = ArgumentAttributes(attrs)
|
||||
|
||||
# Fix and validate arguments
|
||||
args = list(args)
|
||||
@@ -111,8 +118,13 @@ def called_function(self):
|
||||
return self.callee
|
||||
|
||||
def _descr(self, buf, add_metadata):
|
||||
- args = ', '.join(['{0} {1}'.format(a.type, a.get_reference())
|
||||
- for a in self.args])
|
||||
+ def descr_arg(i, a):
|
||||
+ if i in self.arg_attributes:
|
||||
+ attrs = ' '.join(self.arg_attributes[i]._to_list()) + ' '
|
||||
+ else:
|
||||
+ attrs = ''
|
||||
+ return '{0} {1}{2}'.format(a.type, attrs, a.get_reference())
|
||||
+ args = ', '.join([descr_arg(i, a) for i, a in enumerate(self.args)])
|
||||
|
||||
fnty = self.callee.function_type
|
||||
# Only print function type if variable-argument
|
||||
@@ -142,10 +154,12 @@ def descr(self, buf):
|
||||
|
||||
class InvokeInstr(CallInstr):
|
||||
def __init__(self, parent, func, args, normal_to, unwind_to, name='',
|
||||
- cconv=None):
|
||||
+ cconv=None, fastmath=(), attrs=(), arg_attrs=None):
|
||||
assert isinstance(normal_to, Block)
|
||||
assert isinstance(unwind_to, Block)
|
||||
- super(InvokeInstr, self).__init__(parent, func, args, name, cconv)
|
||||
+ super(InvokeInstr, self).__init__(parent, func, args, name, cconv,
|
||||
+ tail=False, fastmath=fastmath,
|
||||
+ attrs=attrs, arg_attrs=arg_attrs)
|
||||
self.opname = "invoke"
|
||||
self.normal_to = normal_to
|
||||
self.unwind_to = unwind_to
|
||||
diff --git a/llvmlite/tests/test_ir.py b/llvmlite/tests/test_ir.py
|
||||
index e97e528ac..ab5864719 100644
|
||||
--- a/llvmlite/tests/test_ir.py
|
||||
+++ b/llvmlite/tests/test_ir.py
|
||||
@@ -1181,6 +1181,39 @@ def test_call_metadata(self):
|
||||
call void @"llvm.dbg.declare"(metadata i32* %"a", metadata !0, metadata !0)
|
||||
""") # noqa E501
|
||||
|
||||
+ def test_call_attributes(self):
|
||||
+ block = self.block(name='my_block')
|
||||
+ builder = ir.IRBuilder(block)
|
||||
+ fun_ty = ir.FunctionType(
|
||||
+ ir.VoidType(), (int32.as_pointer(), int32, int32.as_pointer()))
|
||||
+ fun = ir.Function(builder.function.module, fun_ty, 'fun')
|
||||
+ fun.args[0].add_attribute('sret')
|
||||
+ retval = builder.alloca(int32, name='retval')
|
||||
+ other = builder.alloca(int32, name='other')
|
||||
+ builder.call(
|
||||
+ fun,
|
||||
+ (retval, ir.Constant(int32, 42), other),
|
||||
+ arg_attrs={
|
||||
+ 0: ('sret', 'noalias'),
|
||||
+ 2: 'noalias'
|
||||
+ }
|
||||
+ )
|
||||
+ self.check_block(block, """\
|
||||
+ my_block:
|
||||
+ %"retval" = alloca i32
|
||||
+ %"other" = alloca i32
|
||||
+ call void @"fun"(i32* noalias sret %"retval", i32 42, i32* noalias %"other")
|
||||
+ """) # noqa E501
|
||||
+
|
||||
+ def test_invalid_call_attributes(self):
|
||||
+ block = self.block()
|
||||
+ builder = ir.IRBuilder(block)
|
||||
+ fun_ty = ir.FunctionType(ir.VoidType(), ())
|
||||
+ fun = ir.Function(builder.function.module, fun_ty, 'fun')
|
||||
+ with self.assertRaises(ValueError):
|
||||
+ # The function has no arguments, so this should fail.
|
||||
+ builder.call(fun, (), arg_attrs={0: 'sret'})
|
||||
+
|
||||
def test_invoke(self):
|
||||
block = self.block(name='my_block')
|
||||
builder = ir.IRBuilder(block)
|
||||
@@ -1196,6 +1229,39 @@ def test_invoke(self):
|
||||
to label %"normal" unwind label %"unwind"
|
||||
""")
|
||||
|
||||
+ def test_invoke_attributes(self):
|
||||
+ block = self.block(name='my_block')
|
||||
+ builder = ir.IRBuilder(block)
|
||||
+ fun_ty = ir.FunctionType(
|
||||
+ ir.VoidType(), (int32.as_pointer(), int32, int32.as_pointer()))
|
||||
+ fun = ir.Function(builder.function.module, fun_ty, 'fun')
|
||||
+ fun.calling_convention = "fastcc"
|
||||
+ fun.args[0].add_attribute('sret')
|
||||
+ retval = builder.alloca(int32, name='retval')
|
||||
+ other = builder.alloca(int32, name='other')
|
||||
+ bb_normal = builder.function.append_basic_block(name='normal')
|
||||
+ bb_unwind = builder.function.append_basic_block(name='unwind')
|
||||
+ builder.invoke(
|
||||
+ fun,
|
||||
+ (retval, ir.Constant(int32, 42), other),
|
||||
+ bb_normal,
|
||||
+ bb_unwind,
|
||||
+ cconv='fastcc',
|
||||
+ fastmath='fast',
|
||||
+ attrs='noinline',
|
||||
+ arg_attrs={
|
||||
+ 0: ('sret', 'noalias'),
|
||||
+ 2: 'noalias'
|
||||
+ }
|
||||
+ )
|
||||
+ self.check_block(block, """\
|
||||
+ my_block:
|
||||
+ %"retval" = alloca i32
|
||||
+ %"other" = alloca i32
|
||||
+ invoke fast fastcc void @"fun"(i32* noalias sret %"retval", i32 42, i32* noalias %"other") noinline
|
||||
+ to label %"normal" unwind label %"unwind"
|
||||
+ """) # noqa E501
|
||||
+
|
||||
def test_landingpad(self):
|
||||
block = self.block(name='my_block')
|
||||
builder = ir.IRBuilder(block)
|
||||
|
|
@ -2,15 +2,11 @@
|
|||
|
||||
python3Packages.buildPythonPackage rec {
|
||||
pname = "llvmlite";
|
||||
version = "0.37.0-artiq";
|
||||
version = "0.37.0rc2";
|
||||
src = python3Packages.fetchPypi {
|
||||
inherit pname;
|
||||
version = "0.37.0";
|
||||
sha256 = "sha256-Y5K4cM0BjsDGRda7uRjWqg7sqMYmdLqu4whi1raGWxU=";
|
||||
inherit pname version;
|
||||
sha256 = "sha256-F1quz+76JOt1jaQPVzdKe7RfN6gWG2lyE82qTvgyY/c=";
|
||||
};
|
||||
# https://github.com/numba/llvmlite/pull/702
|
||||
# https://github.com/numba/llvmlite/pull/775
|
||||
patches = [ ./llvmlite-callsite.diff ./llvmlite-abiname.diff ];
|
||||
nativeBuildInputs = [ llvm_11 ];
|
||||
# Disable static linking
|
||||
# https://github.com/numba/llvmlite/issues/93
|
||||
|
|
|
|||
|
|
@ -1,830 +1,24 @@
|
|||
diff --git a/doc/openocd.texi b/doc/openocd.texi
|
||||
index 138922d08..ad9f10d2e 100644
|
||||
--- a/doc/openocd.texi
|
||||
+++ b/doc/openocd.texi
|
||||
@@ -5565,6 +5565,10 @@ will not work. These include all @command{*_image} and
|
||||
functionality is available through the @command{flash write_bank},
|
||||
@command{flash read_bank}, and @command{flash verify_bank} commands.
|
||||
|
||||
+According to device size, 1- to 4-byte addresses are sent. However, some
|
||||
+flash chips additionally have to be switched to 4-byte addresses by an extra
|
||||
+command, see below.
|
||||
+
|
||||
@itemize
|
||||
@item @var{ir} ... is loaded into the JTAG IR to map the flash as the JTAG DR.
|
||||
For the bitstreams generated from @file{xilinx_bscan_spi.py} this is the
|
||||
@@ -5577,6 +5581,29 @@ set _XILINX_USER1 0x02
|
||||
flash bank $_FLASHNAME spi 0x0 0 0 0 \
|
||||
$_TARGETNAME $_XILINX_USER1
|
||||
@end example
|
||||
+
|
||||
+@deffn Command {jtagspi set} bank_id name total_size page_size read_cmd unused pprg_cmd mass_erase_cmd sector_size sector_erase_cmd
|
||||
+Sets flash parameters: @var{name} human readable string, @var{total_size}
|
||||
+size in bytes, @var{page_size} is write page size. @var{read_cmd} and @var{pprg_cmd}
|
||||
+are commands for read and page program, respectively. @var{mass_erase_cmd},
|
||||
+@var{sector_size} and @var{sector_erase_cmd} are optional.
|
||||
+@example
|
||||
+jtagspi set 0 w25q128 0x1000000 0x100 0x03 0 0x02 0xC7 0x10000 0xD8
|
||||
+@end example
|
||||
+@end deffn
|
||||
+
|
||||
+@deffn Command {jtagspi cmd} bank_id resp_num cmd_byte ...
|
||||
+Sends command @var{cmd_byte} and at most 20 following bytes and reads
|
||||
+@var{resp_num} bytes afterwards. E.g. for 'Enter 4-byte address mode'
|
||||
+@example
|
||||
+jtagspi cmd 0 0 0xB7
|
||||
+@end example
|
||||
+@end deffn
|
||||
+
|
||||
+@deffn Command {jtagspi always_4byte} bank_id [ on | off ]
|
||||
+Some devices use 4-byte addresses for all commands except the legacy 0x03 read
|
||||
+regardless of device size. This command controls the corresponding hack.
|
||||
+@end deffn
|
||||
@end deffn
|
||||
|
||||
@deffn {Flash Driver} {xcf}
|
||||
diff --git a/src/flash/nor/jtagspi.c b/src/flash/nor/jtagspi.c
|
||||
index dc49fda61..e9a643d12 100644
|
||||
--- a/src/flash/nor/jtagspi.c
|
||||
+++ b/src/flash/nor/jtagspi.c
|
||||
@@ -29,9 +29,12 @@
|
||||
|
||||
struct jtagspi_flash_bank {
|
||||
struct jtag_tap *tap;
|
||||
- const struct flash_device *dev;
|
||||
+ struct flash_device dev;
|
||||
+ char devname[32];
|
||||
bool probed;
|
||||
+ bool always_4byte; /* use always 4-byte address except for basic read 0x03 */
|
||||
uint32_t ir;
|
||||
+ unsigned int addr_len; /* address length in bytes */
|
||||
};
|
||||
|
||||
FLASH_BANK_COMMAND_HANDLER(jtagspi_flash_bank_command)
|
||||
@@ -42,10 +45,11 @@ FLASH_BANK_COMMAND_HANDLER(jtagspi_flash_bank_command)
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
|
||||
info = malloc(sizeof(struct jtagspi_flash_bank));
|
||||
- if (!info) {
|
||||
+ if (info == NULL) {
|
||||
LOG_ERROR("no memory for flash bank info");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
+ bank->sectors = NULL;
|
||||
bank->driver_priv = info;
|
||||
|
||||
info->tap = NULL;
|
||||
@@ -69,70 +73,59 @@ static void jtagspi_set_ir(struct flash_bank *bank)
|
||||
jtag_add_ir_scan(info->tap, &field, TAP_IDLE);
|
||||
}
|
||||
|
||||
-static void flip_u8(uint8_t *in, uint8_t *out, int len)
|
||||
+static void flip_u8(const uint8_t *in, uint8_t *out, unsigned int len)
|
||||
{
|
||||
- for (int i = 0; i < len; i++)
|
||||
+ for (unsigned int i = 0; i < len; i++)
|
||||
out[i] = flip_u32(in[i], 8);
|
||||
}
|
||||
|
||||
static int jtagspi_cmd(struct flash_bank *bank, uint8_t cmd,
|
||||
- uint32_t *addr, uint8_t *data, int len)
|
||||
+ uint8_t *write_buffer, unsigned int write_len, uint8_t *data_buffer, int data_len)
|
||||
{
|
||||
- struct jtagspi_flash_bank *info = bank->driver_priv;
|
||||
+ assert(write_buffer || write_len == 0);
|
||||
+ assert(data_buffer || data_len == 0);
|
||||
+
|
||||
struct scan_field fields[6];
|
||||
- uint8_t marker = 1;
|
||||
- uint8_t xfer_bits_buf[4];
|
||||
- uint8_t addr_buf[3];
|
||||
- uint8_t *data_buf;
|
||||
- uint32_t xfer_bits;
|
||||
- int is_read, lenb, n;
|
||||
|
||||
- /* LOG_DEBUG("cmd=0x%02x len=%i", cmd, len); */
|
||||
+ LOG_DEBUG("cmd=0x%02x write_len=%d data_len=%d", cmd, write_len, data_len);
|
||||
|
||||
- is_read = (len < 0);
|
||||
+ /* negative data_len == read operation */
|
||||
+ const bool is_read = (data_len < 0);
|
||||
if (is_read)
|
||||
- len = -len;
|
||||
-
|
||||
- n = 0;
|
||||
+ data_len = -data_len;
|
||||
|
||||
+ int n = 0;
|
||||
+ const uint8_t marker = 1;
|
||||
fields[n].num_bits = 1;
|
||||
fields[n].out_value = ▮
|
||||
fields[n].in_value = NULL;
|
||||
n++;
|
||||
|
||||
- xfer_bits = 8 + len - 1;
|
||||
- /* cmd + read/write - 1 due to the counter implementation */
|
||||
- if (addr)
|
||||
- xfer_bits += 24;
|
||||
- h_u32_to_be(xfer_bits_buf, xfer_bits);
|
||||
- flip_u8(xfer_bits_buf, xfer_bits_buf, 4);
|
||||
- fields[n].num_bits = 32;
|
||||
- fields[n].out_value = xfer_bits_buf;
|
||||
+ /* transfer length = cmd + address + read/write,
|
||||
+ * -1 due to the counter implementation */
|
||||
+ uint8_t xfer_bits[4];
|
||||
+ h_u32_to_be(xfer_bits, ((sizeof(cmd) + write_len + data_len) * CHAR_BIT) - 1);
|
||||
+ flip_u8(xfer_bits, xfer_bits, sizeof(xfer_bits));
|
||||
+ fields[n].num_bits = sizeof(xfer_bits) * CHAR_BIT;
|
||||
+ fields[n].out_value = xfer_bits;
|
||||
fields[n].in_value = NULL;
|
||||
n++;
|
||||
|
||||
- cmd = flip_u32(cmd, 8);
|
||||
- fields[n].num_bits = 8;
|
||||
+ flip_u8(&cmd, &cmd, sizeof(cmd));
|
||||
+ fields[n].num_bits = sizeof(cmd) * CHAR_BIT;
|
||||
fields[n].out_value = &cmd;
|
||||
fields[n].in_value = NULL;
|
||||
n++;
|
||||
|
||||
- if (addr) {
|
||||
- h_u24_to_be(addr_buf, *addr);
|
||||
- flip_u8(addr_buf, addr_buf, 3);
|
||||
- fields[n].num_bits = 24;
|
||||
- fields[n].out_value = addr_buf;
|
||||
+ if (write_len) {
|
||||
+ flip_u8(write_buffer, write_buffer, write_len);
|
||||
+ fields[n].num_bits = write_len * CHAR_BIT;
|
||||
+ fields[n].out_value = write_buffer;
|
||||
fields[n].in_value = NULL;
|
||||
n++;
|
||||
}
|
||||
|
||||
- lenb = DIV_ROUND_UP(len, 8);
|
||||
- data_buf = malloc(lenb);
|
||||
- if (lenb > 0) {
|
||||
- if (!data_buf) {
|
||||
- LOG_ERROR("no memory for spi buffer");
|
||||
- return ERROR_FAIL;
|
||||
- }
|
||||
+ if (data_len > 0) {
|
||||
if (is_read) {
|
||||
fields[n].num_bits = jtag_tap_count_enabled();
|
||||
fields[n].out_value = NULL;
|
||||
@@ -140,78 +133,313 @@ static int jtagspi_cmd(struct flash_bank *bank, uint8_t cmd,
|
||||
n++;
|
||||
|
||||
fields[n].out_value = NULL;
|
||||
- fields[n].in_value = data_buf;
|
||||
+ fields[n].in_value = data_buffer;
|
||||
} else {
|
||||
- flip_u8(data, data_buf, lenb);
|
||||
- fields[n].out_value = data_buf;
|
||||
+ flip_u8(data_buffer, data_buffer, data_len);
|
||||
+ fields[n].out_value = data_buffer;
|
||||
fields[n].in_value = NULL;
|
||||
}
|
||||
- fields[n].num_bits = len;
|
||||
+ fields[n].num_bits = data_len * CHAR_BIT;
|
||||
n++;
|
||||
}
|
||||
|
||||
jtagspi_set_ir(bank);
|
||||
/* passing from an IR scan to SHIFT-DR clears BYPASS registers */
|
||||
+ struct jtagspi_flash_bank *info = bank->driver_priv;
|
||||
jtag_add_dr_scan(info->tap, n, fields, TAP_IDLE);
|
||||
int retval = jtag_execute_queue();
|
||||
|
||||
if (is_read)
|
||||
- flip_u8(data_buf, data, lenb);
|
||||
- free(data_buf);
|
||||
+ flip_u8(data_buffer, data_buffer, data_len);
|
||||
return retval;
|
||||
}
|
||||
|
||||
+COMMAND_HANDLER(jtagspi_handle_set)
|
||||
+{
|
||||
+ struct flash_bank *bank = NULL;
|
||||
+ struct jtagspi_flash_bank *info = NULL;
|
||||
+ struct flash_sector *sectors = NULL;
|
||||
+ uint32_t temp;
|
||||
+ unsigned int index = 1;
|
||||
+ int retval;
|
||||
+
|
||||
+ LOG_DEBUG("%s", __func__);
|
||||
+
|
||||
+ /* there are 6 mandatory arguments:
|
||||
+ * devname, size_in_bytes, pagesize, read_cmd, unused, pprog_cmd */
|
||||
+ if (index + 6 > CMD_ARGC) {
|
||||
+ command_print(CMD, "jtagspi: not enough arguments");
|
||||
+ return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
+ }
|
||||
+
|
||||
+ retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
|
||||
+ if (ERROR_OK != retval)
|
||||
+ return retval;
|
||||
+ info = bank->driver_priv;
|
||||
+
|
||||
+ /* invalidate all old info */
|
||||
+ if (info->probed) {
|
||||
+ bank->size = 0;
|
||||
+ bank->num_sectors = 0;
|
||||
+ if (bank->sectors)
|
||||
+ free(bank->sectors);
|
||||
+ bank->sectors = NULL;
|
||||
+ info->always_4byte = false;
|
||||
+ info->probed = false;
|
||||
+ }
|
||||
+ memset(&info->dev, 0, sizeof(info->dev));
|
||||
+
|
||||
+ strncpy(info->devname, CMD_ARGV[index++], sizeof(info->devname) - 1);
|
||||
+ info->devname[sizeof(info->devname) - 1] = '\0';
|
||||
+
|
||||
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[index++], temp);
|
||||
+ info->dev.size_in_bytes = temp;
|
||||
+ if ((temp & (temp - 1)) || (temp < (1UL << 8))) {
|
||||
+ command_print(CMD, "jtagspi: device size must be 2^n with n >= 8");
|
||||
+ return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
+ }
|
||||
+
|
||||
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[index++], temp);
|
||||
+ info->dev.pagesize = temp;
|
||||
+ if (info->dev.pagesize == 0)
|
||||
+ info->dev.pagesize = SPIFLASH_DEF_PAGESIZE;
|
||||
+ if ((temp & (temp - 1)) || (temp > info->dev.size_in_bytes)) {
|
||||
+ command_print(CMD, "jtagspi: page size must be 2^n and <= device size");
|
||||
+ return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
+ }
|
||||
+
|
||||
+ COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.read_cmd);
|
||||
+ if ((info->dev.read_cmd != 0x03) &&
|
||||
+ (info->dev.read_cmd != 0x13)) {
|
||||
+ command_print(CMD, "jtagspi: only 0x03/0x13 READ allowed");
|
||||
+ return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
+ }
|
||||
+
|
||||
+ COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.qread_cmd);
|
||||
+
|
||||
+ COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.pprog_cmd);
|
||||
+ if ((info->dev.pprog_cmd != 0x02) &&
|
||||
+ (info->dev.pprog_cmd != 0x12)) {
|
||||
+ command_print(CMD, "jtagspi: only 0x02/0x12 PPRG allowed");
|
||||
+ return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
+ }
|
||||
+
|
||||
+ /* remaining params are optional */
|
||||
+ if (index < CMD_ARGC)
|
||||
+ COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.chip_erase_cmd);
|
||||
+ else
|
||||
+ info->dev.chip_erase_cmd = 0x00;
|
||||
+
|
||||
+ if (index < CMD_ARGC) {
|
||||
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[index++], temp);
|
||||
+ info->dev.sectorsize = temp;
|
||||
+ if ((info->dev.sectorsize > info->dev.size_in_bytes) ||
|
||||
+ (info->dev.sectorsize < info->dev.pagesize) || (temp & (temp - 1))) {
|
||||
+ command_print(CMD, "jtagspi: sector size must be 2^n and <= device size");
|
||||
+ return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
+ }
|
||||
+
|
||||
+ if (index < CMD_ARGC)
|
||||
+ COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], info->dev.erase_cmd);
|
||||
+ else {
|
||||
+ command_print(CMD, "jtagspi: erase command missing");
|
||||
+ return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
+ }
|
||||
+ } else {
|
||||
+ /* no sector size / sector erase cmd given, treat whole bank as a single sector */
|
||||
+ info->dev.erase_cmd = 0x00;
|
||||
+ info->dev.sectorsize = info->dev.size_in_bytes;
|
||||
+ }
|
||||
+
|
||||
+ if (index < CMD_ARGC) {
|
||||
+ command_print(CMD, "jtagspi: extra arguments");
|
||||
+ return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
+ }
|
||||
+
|
||||
+ /* set correct size value */
|
||||
+ bank->size = info->dev.size_in_bytes;
|
||||
+
|
||||
+ /* calculate address length in bytes */
|
||||
+ if (bank->size <= (1UL << 8))
|
||||
+ info->addr_len = 1;
|
||||
+ else if (bank->size <= (1UL << 16))
|
||||
+ info->addr_len = 2;
|
||||
+ else if (bank->size <= (1UL << 24))
|
||||
+ info->addr_len = 3;
|
||||
+ else {
|
||||
+ info->addr_len = 4;
|
||||
+ LOG_WARNING("4-byte addresses needed, might need extra command to enable");
|
||||
+ }
|
||||
+
|
||||
+ /* create and fill sectors array */
|
||||
+ bank->num_sectors =
|
||||
+ info->dev.size_in_bytes / info->dev.sectorsize;
|
||||
+ sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
|
||||
+ if (sectors == NULL) {
|
||||
+ LOG_ERROR("Not enough memory");
|
||||
+ return ERROR_FAIL;
|
||||
+ }
|
||||
+
|
||||
+ for (unsigned int sector = 0; sector < bank->num_sectors; sector++) {
|
||||
+ sectors[sector].offset = sector * (info->dev.sectorsize);
|
||||
+ sectors[sector].size = info->dev.sectorsize;
|
||||
+ sectors[sector].is_erased = -1;
|
||||
+ sectors[sector].is_protected = 0;
|
||||
+ }
|
||||
+
|
||||
+ bank->sectors = sectors;
|
||||
+ info->dev.name = info->devname;
|
||||
+ if (info->dev.size_in_bytes / 4096)
|
||||
+ LOG_INFO("flash \'%s\' id = unknown\nflash size = %" PRIu32 " kbytes",
|
||||
+ info->dev.name, info->dev.size_in_bytes / 1024);
|
||||
+ else
|
||||
+ LOG_INFO("flash \'%s\' id = unknown\nflash size = %" PRIu32 " bytes",
|
||||
+ info->dev.name, info->dev.size_in_bytes);
|
||||
+ info->probed = true;
|
||||
+
|
||||
+ return ERROR_OK;
|
||||
+}
|
||||
+
|
||||
+COMMAND_HANDLER(jtagspi_handle_cmd)
|
||||
+{
|
||||
+ struct flash_bank *bank;
|
||||
+ unsigned int index = 1;
|
||||
+ const int max = 21;
|
||||
+ uint8_t num_write, num_read, write_buffer[max], read_buffer[1 << CHAR_BIT];
|
||||
+ uint8_t data, *ptr;
|
||||
+ char temp[4], output[(2 + max + (1 << CHAR_BIT)) * 3 + 8];
|
||||
+ int retval;
|
||||
+
|
||||
+ LOG_DEBUG("%s", __func__);
|
||||
+
|
||||
+ if (CMD_ARGC < 3) {
|
||||
+ command_print(CMD, "jtagspi: not enough arguments");
|
||||
+ return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
+ }
|
||||
+
|
||||
+ num_write = CMD_ARGC - 2;
|
||||
+ if (num_write > max) {
|
||||
+ LOG_ERROR("at most %d bytes may be send", max);
|
||||
+ return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
+ }
|
||||
+
|
||||
+ retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
|
||||
+ if (ERROR_OK != retval)
|
||||
+ return retval;
|
||||
+
|
||||
+ COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index++], num_read);
|
||||
+
|
||||
+ snprintf(output, sizeof(output), "spi: ");
|
||||
+ for (ptr = &write_buffer[0] ; index < CMD_ARGC; index++) {
|
||||
+ COMMAND_PARSE_NUMBER(u8, CMD_ARGV[index], data);
|
||||
+ *ptr++ = data;
|
||||
+ snprintf(temp, sizeof(temp), "%02" PRIx8 " ", data);
|
||||
+ strncat(output, temp, sizeof(output) - strlen(output) - 1);
|
||||
+ }
|
||||
+ strncat(output, "-> ", sizeof(output) - strlen(output) - 1);
|
||||
+
|
||||
+ /* process command */
|
||||
+ ptr = &read_buffer[0];
|
||||
+ jtagspi_cmd(bank, write_buffer[0], &write_buffer[1], num_write - 1, ptr, -num_read);
|
||||
+ if (retval != ERROR_OK)
|
||||
+ return retval;
|
||||
+
|
||||
+ for ( ; num_read > 0; num_read--) {
|
||||
+ snprintf(temp, sizeof(temp), "%02" PRIx8 " ", *ptr++);
|
||||
+ strncat(output, temp, sizeof(output) - strlen(output) - 1);
|
||||
+ }
|
||||
+ command_print(CMD, "%s", output);
|
||||
+
|
||||
+ return ERROR_OK;
|
||||
+}
|
||||
+
|
||||
+COMMAND_HANDLER(jtagspi_handle_always_4byte)
|
||||
+{
|
||||
+ struct flash_bank *bank;
|
||||
+ struct jtagspi_flash_bank *jtagspi_info;
|
||||
+ int retval;
|
||||
+
|
||||
+ LOG_DEBUG("%s", __func__);
|
||||
+
|
||||
+ if ((CMD_ARGC != 1) && (CMD_ARGC != 2))
|
||||
+ return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
+
|
||||
+ retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
|
||||
+ if (ERROR_OK != retval)
|
||||
+ return retval;
|
||||
+
|
||||
+ jtagspi_info = bank->driver_priv;
|
||||
+
|
||||
+ if (CMD_ARGC == 1)
|
||||
+ command_print(CMD, jtagspi_info->always_4byte ? "on" : "off");
|
||||
+ else
|
||||
+ COMMAND_PARSE_BOOL(CMD_ARGV[1], jtagspi_info->always_4byte, "on", "off");
|
||||
+
|
||||
+ return ERROR_OK;
|
||||
+}
|
||||
+
|
||||
static int jtagspi_probe(struct flash_bank *bank)
|
||||
{
|
||||
struct jtagspi_flash_bank *info = bank->driver_priv;
|
||||
struct flash_sector *sectors;
|
||||
+ const struct flash_device *p;
|
||||
uint8_t in_buf[3];
|
||||
uint32_t id, sectorsize;
|
||||
|
||||
- if (info->probed)
|
||||
+ if (bank->sectors) {
|
||||
free(bank->sectors);
|
||||
+ bank->sectors = NULL;
|
||||
+ }
|
||||
info->probed = false;
|
||||
|
||||
- if (!bank->target->tap) {
|
||||
+ if (bank->target->tap == NULL) {
|
||||
LOG_ERROR("Target has no JTAG tap");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
info->tap = bank->target->tap;
|
||||
|
||||
- jtagspi_cmd(bank, SPIFLASH_READ_ID, NULL, in_buf, -24);
|
||||
+ jtagspi_cmd(bank, SPIFLASH_READ_ID, NULL, 0, in_buf, -3);
|
||||
/* the table in spi.c has the manufacturer byte (first) as the lsb */
|
||||
id = le_to_h_u24(in_buf);
|
||||
|
||||
- info->dev = NULL;
|
||||
- for (const struct flash_device *p = flash_devices; p->name ; p++)
|
||||
+ memset(&info->dev, 0, sizeof(info->dev));
|
||||
+ for (p = flash_devices; p->name ; p++)
|
||||
if (p->device_id == id) {
|
||||
- info->dev = p;
|
||||
+ memcpy(&info->dev, p, sizeof(info->dev));
|
||||
break;
|
||||
}
|
||||
|
||||
- if (!(info->dev)) {
|
||||
- LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", id);
|
||||
+ if (!(p->name)) {
|
||||
+ LOG_ERROR("Unknown flash device (ID 0x%06" PRIx32 ")", id & 0xFFFFFF);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
- LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32 ")",
|
||||
- info->dev->name, info->dev->device_id);
|
||||
+ LOG_INFO("Found flash device \'%s\' (ID 0x%06" PRIx32 ")",
|
||||
+ info->dev.name, info->dev.device_id & 0xFFFFFF);
|
||||
|
||||
/* Set correct size value */
|
||||
- bank->size = info->dev->size_in_bytes;
|
||||
- if (bank->size <= (1UL << 16))
|
||||
- LOG_WARNING("device needs 2-byte addresses - not implemented");
|
||||
- if (bank->size > (1UL << 24))
|
||||
- LOG_WARNING("device needs paging or 4-byte addresses - not implemented");
|
||||
+ bank->size = info->dev.size_in_bytes;
|
||||
+
|
||||
+ /* calculate address length in bytes */
|
||||
+ if (bank->size <= (1UL << 8))
|
||||
+ info->addr_len = 1;
|
||||
+ else if (bank->size <= (1UL << 16))
|
||||
+ info->addr_len = 2;
|
||||
+ else if (bank->size <= (1UL << 24))
|
||||
+ info->addr_len = 3;
|
||||
+ else {
|
||||
+ info->addr_len = 4;
|
||||
+ LOG_WARNING("4-byte addresses needed, might need extra command to enable");
|
||||
+ }
|
||||
|
||||
/* if no sectors, treat whole bank as single sector */
|
||||
- sectorsize = info->dev->sectorsize ?
|
||||
- info->dev->sectorsize : info->dev->size_in_bytes;
|
||||
+ sectorsize = info->dev.sectorsize ?
|
||||
+ info->dev.sectorsize : info->dev.size_in_bytes;
|
||||
|
||||
/* create and fill sectors array */
|
||||
- bank->num_sectors = info->dev->size_in_bytes / sectorsize;
|
||||
+ bank->num_sectors = info->dev.size_in_bytes / sectorsize;
|
||||
sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
|
||||
- if (!sectors) {
|
||||
+ if (sectors == NULL) {
|
||||
LOG_ERROR("not enough memory");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
@@ -228,27 +456,35 @@ static int jtagspi_probe(struct flash_bank *bank)
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
+static int jtagspi_auto_probe(struct flash_bank *bank)
|
||||
+{
|
||||
+ struct jtagspi_flash_bank *info = bank->driver_priv;
|
||||
+
|
||||
+ if (info->probed)
|
||||
+ return ERROR_OK;
|
||||
+ return jtagspi_probe(bank);
|
||||
+}
|
||||
+
|
||||
static int jtagspi_read_status(struct flash_bank *bank, uint32_t *status)
|
||||
{
|
||||
uint8_t buf;
|
||||
- int err = jtagspi_cmd(bank, SPIFLASH_READ_STATUS, NULL, &buf, -8);
|
||||
+ int err = jtagspi_cmd(bank, SPIFLASH_READ_STATUS, NULL, 0, &buf, -1);
|
||||
if (err == ERROR_OK) {
|
||||
*status = buf;
|
||||
- /* LOG_DEBUG("status=0x%08" PRIx32, *status); */
|
||||
+ LOG_DEBUG("status=0x%02" PRIx8, *status);
|
||||
}
|
||||
-
|
||||
return err;
|
||||
}
|
||||
|
||||
static int jtagspi_wait(struct flash_bank *bank, int timeout_ms)
|
||||
{
|
||||
- uint32_t status;
|
||||
int64_t t0 = timeval_ms();
|
||||
int64_t dt;
|
||||
|
||||
do {
|
||||
dt = timeval_ms() - t0;
|
||||
|
||||
+ uint32_t status = (uint32_t)-1;
|
||||
int retval = jtagspi_read_status(bank, &status);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
@@ -266,16 +502,15 @@ static int jtagspi_wait(struct flash_bank *bank, int timeout_ms)
|
||||
|
||||
static int jtagspi_write_enable(struct flash_bank *bank)
|
||||
{
|
||||
- uint32_t status;
|
||||
-
|
||||
- jtagspi_cmd(bank, SPIFLASH_WRITE_ENABLE, NULL, NULL, 0);
|
||||
+ jtagspi_cmd(bank, SPIFLASH_WRITE_ENABLE, NULL, 0, NULL, 0);
|
||||
|
||||
+ uint32_t status = (uint32_t)-1;
|
||||
int retval = jtagspi_read_status(bank, &status);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
if ((status & SPIFLASH_WE_BIT) == 0) {
|
||||
- LOG_ERROR("Cannot enable write to flash. Status=0x%08" PRIx32, status);
|
||||
+ LOG_ERROR("Cannot enable write to flash. Status=0x%02" PRIx8, status);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
return ERROR_OK;
|
||||
@@ -287,28 +522,51 @@ static int jtagspi_bulk_erase(struct flash_bank *bank)
|
||||
int retval;
|
||||
int64_t t0 = timeval_ms();
|
||||
|
||||
- if (info->dev->chip_erase_cmd == 0x00)
|
||||
+ if (info->dev.chip_erase_cmd == 0x00)
|
||||
return ERROR_FLASH_OPER_UNSUPPORTED;
|
||||
|
||||
retval = jtagspi_write_enable(bank);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
- jtagspi_cmd(bank, info->dev->chip_erase_cmd, NULL, NULL, 0);
|
||||
- retval = jtagspi_wait(bank, bank->num_sectors*JTAGSPI_MAX_TIMEOUT);
|
||||
+
|
||||
+ jtagspi_cmd(bank, info->dev.chip_erase_cmd, NULL, 0, NULL, 0);
|
||||
+ if (retval != ERROR_OK)
|
||||
+ return retval;
|
||||
+
|
||||
+ retval = jtagspi_wait(bank, bank->num_sectors * JTAGSPI_MAX_TIMEOUT);
|
||||
LOG_INFO("took %" PRId64 " ms", timeval_ms() - t0);
|
||||
return retval;
|
||||
}
|
||||
|
||||
+static uint8_t *fill_addr(uint32_t addr, unsigned int addr_len, uint8_t *buffer)
|
||||
+{
|
||||
+ for (buffer += addr_len; addr_len > 0; --addr_len) {
|
||||
+ *--buffer = addr;
|
||||
+ addr >>= 8;
|
||||
+ }
|
||||
+
|
||||
+ return buffer;
|
||||
+}
|
||||
+
|
||||
static int jtagspi_sector_erase(struct flash_bank *bank, unsigned int sector)
|
||||
{
|
||||
struct jtagspi_flash_bank *info = bank->driver_priv;
|
||||
int retval;
|
||||
+ uint8_t addr[sizeof(uint32_t)];
|
||||
int64_t t0 = timeval_ms();
|
||||
|
||||
retval = jtagspi_write_enable(bank);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
- jtagspi_cmd(bank, info->dev->erase_cmd, &bank->sectors[sector].offset, NULL, 0);
|
||||
+
|
||||
+ /* ATXP032/064/128 use always 4-byte addresses except for 0x03 read */
|
||||
+ unsigned int addr_len = info->always_4byte ? 4 : info->addr_len;
|
||||
+
|
||||
+ retval = jtagspi_cmd(bank, info->dev.erase_cmd, fill_addr(bank->sectors[sector].offset, addr_len, addr),
|
||||
+ addr_len, NULL, 0);
|
||||
+ if (retval != ERROR_OK)
|
||||
+ return retval;
|
||||
+
|
||||
retval = jtagspi_wait(bank, JTAGSPI_MAX_TIMEOUT);
|
||||
LOG_INFO("sector %u took %" PRId64 " ms", sector, timeval_ms() - t0);
|
||||
return retval;
|
||||
@@ -339,8 +597,9 @@ static int jtagspi_erase(struct flash_bank *bank, unsigned int first,
|
||||
}
|
||||
}
|
||||
|
||||
- if (first == 0 && last == (bank->num_sectors - 1)
|
||||
- && info->dev->chip_erase_cmd != info->dev->erase_cmd) {
|
||||
+ if (first == 0 && last == (bank->num_sectors - 1) &&
|
||||
+ info->dev.chip_erase_cmd != 0x00 &&
|
||||
+ info->dev.chip_erase_cmd != info->dev.erase_cmd) {
|
||||
LOG_DEBUG("Trying bulk erase.");
|
||||
retval = jtagspi_bulk_erase(bank);
|
||||
if (retval == ERROR_OK)
|
||||
@@ -349,7 +608,7 @@ static int jtagspi_erase(struct flash_bank *bank, unsigned int first,
|
||||
LOG_WARNING("Bulk flash erase failed. Falling back to sector erase.");
|
||||
}
|
||||
|
||||
- if (info->dev->erase_cmd == 0x00)
|
||||
+ if (info->dev.erase_cmd == 0x00)
|
||||
return ERROR_FLASH_OPER_UNSUPPORTED;
|
||||
|
||||
for (unsigned int sector = first; sector <= last; sector++) {
|
||||
@@ -374,49 +633,93 @@ static int jtagspi_protect(struct flash_bank *bank, int set, unsigned int first,
|
||||
static int jtagspi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
|
||||
{
|
||||
struct jtagspi_flash_bank *info = bank->driver_priv;
|
||||
+ uint32_t pagesize, currsize;
|
||||
+ uint8_t addr[sizeof(uint32_t)];
|
||||
+ int retval;
|
||||
|
||||
if (!(info->probed)) {
|
||||
- LOG_ERROR("Flash bank not yet probed.");
|
||||
+ LOG_ERROR("Flash bank not probed.");
|
||||
return ERROR_FLASH_BANK_NOT_PROBED;
|
||||
}
|
||||
|
||||
- jtagspi_cmd(bank, SPIFLASH_READ, &offset, buffer, -count*8);
|
||||
+ /* if no sectorsize, use reasonable default */
|
||||
+ pagesize = info->dev.sectorsize ? info->dev.sectorsize : info->dev.pagesize;
|
||||
+ if (pagesize == 0)
|
||||
+ pagesize = (info->dev.size_in_bytes <= SPIFLASH_DEF_PAGESIZE) ?
|
||||
+ info->dev.size_in_bytes : SPIFLASH_DEF_PAGESIZE;
|
||||
+
|
||||
+ /* ATXP032/064/128 use always 4-byte addresses except for 0x03 read */
|
||||
+ unsigned int addr_len = ((info->dev.read_cmd != 0x03) && info->always_4byte) ? 4 : info->addr_len;
|
||||
+
|
||||
+ while (count > 0) {
|
||||
+ /* length up to end of current page */
|
||||
+ currsize = ((offset + pagesize) & ~(pagesize - 1)) - offset;
|
||||
+ /* but no more than remaining size */
|
||||
+ currsize = (count < currsize) ? count : currsize;
|
||||
+
|
||||
+ retval = jtagspi_cmd(bank, info->dev.read_cmd, fill_addr(offset, addr_len, addr),
|
||||
+ addr_len, buffer, -currsize);
|
||||
+ if (retval != ERROR_OK) {
|
||||
+ LOG_ERROR("page read error");
|
||||
+ return retval;
|
||||
+ }
|
||||
+ LOG_DEBUG("read page at 0x%08" PRIx32, offset);
|
||||
+ offset += currsize;
|
||||
+ buffer += currsize;
|
||||
+ count -= currsize;
|
||||
+ }
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int jtagspi_page_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
|
||||
{
|
||||
+ struct jtagspi_flash_bank *info = bank->driver_priv;
|
||||
+ uint8_t addr[sizeof(uint32_t)];
|
||||
int retval;
|
||||
|
||||
retval = jtagspi_write_enable(bank);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
- jtagspi_cmd(bank, SPIFLASH_PAGE_PROGRAM, &offset, (uint8_t *) buffer, count*8);
|
||||
+
|
||||
+ /* ATXP032/064/128 use always 4-byte addresses except for 0x03 read */
|
||||
+ unsigned int addr_len = ((info->dev.read_cmd != 0x03) && info->always_4byte) ? 4 : info->addr_len;
|
||||
+
|
||||
+ retval = jtagspi_cmd(bank, info->dev.pprog_cmd, fill_addr(offset, addr_len, addr),
|
||||
+ addr_len, (uint8_t *) buffer, count);
|
||||
+ if (retval != ERROR_OK)
|
||||
+ return retval;
|
||||
return jtagspi_wait(bank, JTAGSPI_MAX_TIMEOUT);
|
||||
}
|
||||
|
||||
static int jtagspi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
|
||||
{
|
||||
struct jtagspi_flash_bank *info = bank->driver_priv;
|
||||
+ uint32_t pagesize, currsize;
|
||||
int retval;
|
||||
- uint32_t n, pagesize;
|
||||
|
||||
if (!(info->probed)) {
|
||||
- LOG_ERROR("Flash bank not yet probed.");
|
||||
+ LOG_ERROR("Flash bank not probed.");
|
||||
return ERROR_FLASH_BANK_NOT_PROBED;
|
||||
}
|
||||
|
||||
/* if no write pagesize, use reasonable default */
|
||||
- pagesize = info->dev->pagesize ? info->dev->pagesize : SPIFLASH_DEF_PAGESIZE;
|
||||
+ pagesize = info->dev.pagesize ? info->dev.pagesize : SPIFLASH_DEF_PAGESIZE;
|
||||
+
|
||||
+ while (count > 0) {
|
||||
+ /* length up to end of current page */
|
||||
+ currsize = ((offset + pagesize) & ~(pagesize - 1)) - offset;
|
||||
+ /* but no more than remaining size */
|
||||
+ currsize = (count < currsize) ? count : currsize;
|
||||
|
||||
- for (n = 0; n < count; n += pagesize) {
|
||||
- retval = jtagspi_page_write(bank, buffer + n, offset + n,
|
||||
- MIN(count - n, pagesize));
|
||||
+ retval = jtagspi_page_write(bank, buffer, offset, currsize);
|
||||
if (retval != ERROR_OK) {
|
||||
LOG_ERROR("page write error");
|
||||
return retval;
|
||||
}
|
||||
- LOG_DEBUG("wrote page at 0x%08" PRIx32, offset + n);
|
||||
+ LOG_DEBUG("wrote page at 0x%08" PRIx32, offset);
|
||||
+ offset += currsize;
|
||||
+ buffer += currsize;
|
||||
+ count -= currsize;
|
||||
}
|
||||
return ERROR_OK;
|
||||
}
|
||||
@@ -430,22 +733,72 @@ static int jtagspi_info(struct flash_bank *bank, struct command_invocation *cmd)
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
- command_print_sameline(cmd, "\nSPIFI flash information:\n"
|
||||
- " Device \'%s\' (ID 0x%08" PRIx32 ")\n",
|
||||
- info->dev->name, info->dev->device_id);
|
||||
+ command_print_sameline(cmd, "flash \'%s\', device id = 0x%06" PRIx32
|
||||
+ ", flash size = %" PRIu32 " %sbytes\n(page size = %" PRIu32
|
||||
+ ", read = 0x%02" PRIx8 ", qread = 0x%02" PRIx8
|
||||
+ ", pprog = 0x%02" PRIx8 ", mass_erase = 0x%02" PRIx8
|
||||
+ ", sector size = %" PRIu32 " %sbytes, sector_erase = 0x%02" PRIx8 ")",
|
||||
+ info->dev.name, info->dev.device_id & 0xFFFFFF,
|
||||
+ bank->size / 4096 ? bank->size / 1024 : bank->size,
|
||||
+ bank->size / 4096 ? "k" : "", info->dev.pagesize,
|
||||
+ info->dev.read_cmd, info->dev.qread_cmd,
|
||||
+ info->dev.pprog_cmd, info->dev.chip_erase_cmd,
|
||||
+ info->dev.sectorsize / 4096 ?
|
||||
+ info->dev.sectorsize / 1024 : info->dev.sectorsize,
|
||||
+ info->dev.sectorsize / 4096 ? "k" : "",
|
||||
+ info->dev.erase_cmd);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
+static const struct command_registration jtagspi_exec_command_handlers[] = {
|
||||
+ {
|
||||
+ .name = "set",
|
||||
+ .handler = jtagspi_handle_set,
|
||||
+ .mode = COMMAND_EXEC,
|
||||
+ .usage = "bank_id name chip_size page_size read_cmd unused pprg_cmd "
|
||||
+ "[ mass_erase_cmd ] [ sector_size sector_erase_cmd ]",
|
||||
+ .help = "Set device parameters if not autodetected.",
|
||||
+ },
|
||||
+ {
|
||||
+ .name = "cmd",
|
||||
+ .handler = jtagspi_handle_cmd,
|
||||
+ .mode = COMMAND_EXEC,
|
||||
+ .usage = "bank_id num_resp cmd_byte ...",
|
||||
+ .help = "Send low-level command cmd_byte and following bytes, read num_bytes.",
|
||||
+ },
|
||||
+ {
|
||||
+ .name = "always_4byte",
|
||||
+ .handler = jtagspi_handle_always_4byte,
|
||||
+ .mode = COMMAND_EXEC,
|
||||
+ .usage = "bank_id [ on | off ]",
|
||||
+ .help = "Use always 4-byte address except for basic 0x03.",
|
||||
+ },
|
||||
+
|
||||
+ COMMAND_REGISTRATION_DONE
|
||||
+};
|
||||
+
|
||||
+static const struct command_registration jtagspi_command_handlers[] = {
|
||||
+ {
|
||||
+ .name = "jtagspi",
|
||||
+ .mode = COMMAND_ANY,
|
||||
+ .help = "jtagspi command group",
|
||||
+ .usage = "",
|
||||
+ .chain = jtagspi_exec_command_handlers,
|
||||
+ },
|
||||
+ COMMAND_REGISTRATION_DONE
|
||||
+};
|
||||
+
|
||||
const struct flash_driver jtagspi_flash = {
|
||||
.name = "jtagspi",
|
||||
+ .commands = jtagspi_command_handlers,
|
||||
.flash_bank_command = jtagspi_flash_bank_command,
|
||||
.erase = jtagspi_erase,
|
||||
.protect = jtagspi_protect,
|
||||
.write = jtagspi_write,
|
||||
.read = jtagspi_read,
|
||||
.probe = jtagspi_probe,
|
||||
- .auto_probe = jtagspi_probe,
|
||||
+ .auto_probe = jtagspi_auto_probe,
|
||||
.erase_check = default_flash_blank_check,
|
||||
.info = jtagspi_info,
|
||||
.free_driver_priv = default_flash_free_driver_priv,
|
||||
diff --git a/src/flash/nor/spi.c b/src/flash/nor/spi.c
|
||||
index af72ffc4..e5c9a9bd 100644
|
||||
--- a/src/flash/nor/spi.c
|
||||
+++ b/src/flash/nor/spi.c
|
||||
@@ -90,8 +90,8 @@ const struct flash_device flash_devices[] = {
|
||||
FLASH_ID("mac 25r6435f", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001728c2, 0x100, 0x10000, 0x800000),
|
||||
FLASH_ID("micron n25q064", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x0017ba20, 0x100, 0x10000, 0x800000),
|
||||
FLASH_ID("micron n25q128", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x0018ba20, 0x100, 0x10000, 0x1000000),
|
||||
- FLASH_ID("micron n25q256 3v", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0019ba20, 0x100, 0x10000, 0x2000000),
|
||||
- FLASH_ID("micron n25q256 1.8v", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0019bb20, 0x100, 0x10000, 0x2000000),
|
||||
+ FLASH_ID("micron n25q256 3v", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x0019ba20, 0x100, 0x10000, 0x2000000),
|
||||
+ FLASH_ID("micron n25q256 1.8v", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x0019bb20, 0x100, 0x10000, 0x2000000),
|
||||
FLASH_ID("micron mt25ql512", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0020ba20, 0x100, 0x10000, 0x4000000),
|
||||
FLASH_ID("micron mt25ql01", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0021ba20, 0x100, 0x10000, 0x8000000),
|
||||
FLASH_ID("micron mt25ql02", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0022ba20, 0x100, 0x10000, 0x10000000),
|
||||
@@ -124,7 +124,7 @@ const struct flash_device flash_devices[] = {
|
||||
FLASH_ID("issi is25lp064", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x0017609d, 0x100, 0x10000, 0x800000),
|
||||
FLASH_ID("issi is25lp128d", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x0018609d, 0x100, 0x10000, 0x1000000),
|
||||
FLASH_ID("issi is25wp128d", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x0018709d, 0x100, 0x10000, 0x1000000),
|
||||
- FLASH_ID("issi is25lp256d", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0019609d, 0x100, 0x10000, 0x2000000),
|
||||
+ FLASH_ID("issi is25lp256d", 0x03, 0xeb, 0x02, 0xd8, 0xc7, 0x0019609d, 0x100, 0x10000, 0x2000000),
|
||||
FLASH_ID("issi is25wp256d", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x0019709d, 0x100, 0x10000, 0x2000000),
|
||||
FLASH_ID("issi is25lp512m", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x001a609d, 0x100, 0x10000, 0x4000000),
|
||||
FLASH_ID("issi is25wp512m", 0x13, 0xec, 0x12, 0xdc, 0xc7, 0x001a709d, 0x100, 0x10000, 0x4000000),
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
{ stdenv, buildEnv, lib, fetchFromGitHub, autoreconfHook269, openocd }:
|
||||
{ stdenv, buildEnv, lib, fetchFromGitHub, openocd }:
|
||||
let
|
||||
bscan_spi_bitstreams-pkg = stdenv.mkDerivation {
|
||||
name = "bscan_spi_bitstreams";
|
||||
|
|
@ -15,18 +15,9 @@ let
|
|||
cp $src/*.bit $out/share/bscan-spi-bitstreams
|
||||
'';
|
||||
};
|
||||
# https://docs.lambdaconcept.com/screamer/troubleshooting.html#error-contents-differ
|
||||
openocd-fixed = openocd.overrideAttrs(oa: {
|
||||
version = "unstable-2021-09-15";
|
||||
src = fetchFromGitHub {
|
||||
owner = "openocd-org";
|
||||
repo = "openocd";
|
||||
rev = "a0bd3c9924870c3b8f428648410181040dabc33c";
|
||||
sha256 = "sha256-YgUsl4/FohfsOncM4uiz/3c6g2ZN4oZ0y5vV/2Skwqg=";
|
||||
fetchSubmodules = true;
|
||||
};
|
||||
# https://review.openocd.org/c/openocd/+/4876
|
||||
patches = oa.patches or [] ++ [ ./openocd-jtagspi.diff ];
|
||||
nativeBuildInputs = oa.nativeBuildInputs or [] ++ [ autoreconfHook269 ];
|
||||
});
|
||||
in
|
||||
buildEnv {
|
||||
|
|
|
|||
|
|
@ -71,14 +71,14 @@ rec {
|
|||
|
||||
misoc = python3Packages.buildPythonPackage {
|
||||
pname = "misoc";
|
||||
version = if misoc-new then "unstable-2021-10-10" else "unstable-2021-02-15";
|
||||
version = if misoc-new then "unstable-2021-09-10" else "unstable-2021-02-15";
|
||||
|
||||
src = if misoc-new
|
||||
then (fetchFromGitHub {
|
||||
owner = "m-labs";
|
||||
repo = "misoc";
|
||||
rev = "f5203e406520874e15ab5d070058ef642fc57fd9";
|
||||
sha256 = "sha256-/2XTejqj0Bo81HaTrlTSWwInnWwsuqnq+CURXbpIrkA=";
|
||||
rev = "c9572e777febf7abcfbebf624e0323d82600f267";
|
||||
sha256 = "sha256-dal999XLFvS8Ol1hZnQjx7q/UfAXkzSMhAWcZKCDPx4=";
|
||||
fetchSubmodules = true;
|
||||
})
|
||||
else (fetchFromGitHub {
|
||||
|
|
@ -104,13 +104,13 @@ rec {
|
|||
|
||||
migen = python3Packages.buildPythonPackage rec {
|
||||
pname = "migen";
|
||||
version = "unstable-2021-12-16";
|
||||
version = "unstable-2021-08-10";
|
||||
|
||||
src = fetchFromGitHub {
|
||||
owner = "m-labs";
|
||||
repo = "migen";
|
||||
rev = "ac703010eaa06ac9b6e32f97c6fa98b15de22b31";
|
||||
sha256 = "sha256-qpVj/yJf4hDDc99XXpVPH4EbLC8aCmEtACn5qNc3DGI=";
|
||||
rev = "27dbf03edd75c32dc1706e2a1316950c3a8d452a";
|
||||
sha256 = "0c7c7bbc05cb8xvxd612cxr7mvsxhaim0apfh7ax32wi9ykpl1ad";
|
||||
};
|
||||
|
||||
propagatedBuildInputs = with python3Packages; [ colorama ];
|
||||
|
|
@ -213,13 +213,13 @@ rec {
|
|||
|
||||
migen-axi = python3Packages.buildPythonPackage {
|
||||
pname = "migen-axi";
|
||||
version = "unstable-2021-09-15";
|
||||
version = "unstable-2021-08-23";
|
||||
|
||||
src = fetchFromGitHub {
|
||||
owner = "peteut";
|
||||
repo = "migen-axi";
|
||||
rev = "9763505ee96acd7572280a2d1233721342dc7c3f";
|
||||
sha256 = "15c7g05n183rka66fl1glzp6h7xjlpy1p6k8biry24dangsmxmvg";
|
||||
rev = "1f94ee0fc847dad118020bfc8c6a8f26ed9958bd";
|
||||
sha256 = "0bk4g8k7cng8na01p7h6llrfpjkmxsamyi1kacvk3n110l2kl93g";
|
||||
};
|
||||
|
||||
nativeBuildInputs = [ python3Packages.pbr ];
|
||||
|
|
@ -227,7 +227,7 @@ rec {
|
|||
|
||||
postPatch = ''
|
||||
substituteInPlace requirements.txt \
|
||||
--replace "jinja2==2.11.3" "jinja2"
|
||||
--replace "jinja2==2.10.3" "jinja2"
|
||||
substituteInPlace requirements.txt \
|
||||
--replace "future==0.18.2" "future"
|
||||
substituteInPlace requirements.txt \
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
# Install Vivado in /opt and add to /etc/nixos/configuration.nix:
|
||||
# nix.sandboxPaths = ["/opt"];
|
||||
|
||||
{ pkgs, vivadoPath ? "/opt/Xilinx/Vivado/2021.2" }:
|
||||
{ pkgs, vivadoPath ? "/opt/Xilinx/Vivado/2020.1" }:
|
||||
|
||||
pkgs.buildFHSUserEnv {
|
||||
name = "vivado";
|
||||
|
|
@ -17,7 +17,7 @@ pkgs.buildFHSUserEnv {
|
|||
xorg.libXext
|
||||
xorg.libXtst
|
||||
xorg.libXi
|
||||
] ++ ( if pkgs ? libxcrypt-legacy then [ pkgs.libxcrypt-legacy ] else [])
|
||||
]
|
||||
);
|
||||
profile = "source ${vivadoPath}/settings64.sh";
|
||||
runScript = "vivado";
|
||||
|
|
|
|||
|
|
@ -1,18 +1,23 @@
|
|||
{ pkgs } : [
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/noarch/cached-property-1.5.2-py_0.tar.bz2";
|
||||
sha256 = "01mcbrsrdwvinyvp0fs2hbkczydb33gbz59ldhb1484w5mm9y9bi";
|
||||
url = "https://repo.anaconda.com/pkgs/main/noarch/python-dateutil-2.8.2-pyhd3eb1b0_0.tar.bz2";
|
||||
sha256 = "1brzm9v9yvs3xhdh89jzw5xjq4a3r9vizhkhdfcax86d2q52ji97";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/noarch/zipp-3.6.0-pyhd3eb1b0_0.tar.bz2";
|
||||
sha256 = "1wj0hmhn09b4szs5zyslpd1mggy90pbjil6q3lyqkw3z492za80q";
|
||||
url = "https://repo.anaconda.com/pkgs/main/noarch/six-1.16.0-pyhd3eb1b0_0.tar.bz2";
|
||||
sha256 = "120wav3bxbyv0jsvbl94rxsigqqchsqg4qqxccg9ij7ydirmqaql";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://conda.anaconda.org/conda-forge/noarch/prettytable-2.4.0-pyhd8ed1ab_0.tar.bz2";
|
||||
sha256 = "1iv2x8m8xf2y8v68kz2lil2zaji7gsz099zs8wsrap03j5vpraf0";
|
||||
url = "https://repo.anaconda.com/pkgs/main/noarch/zipp-3.5.0-pyhd3eb1b0_0.tar.bz2";
|
||||
sha256 = "0d5priwvdg0ic28nk92x7y6nx4av3nmrl1dl36wa5xlzjzz6ck1f";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/noarch/wcwidth-0.2.5-pyhd3eb1b0_0.tar.bz2";
|
||||
sha256 = "1x3sncbrp7bml6qjss24qyy0rsjbdhnzjwpf6apcd14kzspnr21a";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
|
|
@ -26,27 +31,17 @@
|
|||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/noarch/six-1.16.0-pyhd3eb1b0_0.tar.bz2";
|
||||
sha256 = "120wav3bxbyv0jsvbl94rxsigqqchsqg4qqxccg9ij7ydirmqaql";
|
||||
url = "https://repo.anaconda.com/pkgs/main/noarch/cached-property-1.5.2-py_0.tar.bz2";
|
||||
sha256 = "01mcbrsrdwvinyvp0fs2hbkczydb33gbz59ldhb1484w5mm9y9bi";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/noarch/python-dateutil-2.8.2-pyhd3eb1b0_0.tar.bz2";
|
||||
sha256 = "1brzm9v9yvs3xhdh89jzw5xjq4a3r9vizhkhdfcax86d2q52ji97";
|
||||
url = "https://repo.anaconda.com/pkgs/main/noarch/tzdata-2021a-h5d7bf9c_0.tar.bz2";
|
||||
sha256 = "0xpwgr38wl1mgiw5zz3dd7v65djqhwry4wgf659lqhihf1f5rk3n";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/noarch/pycparser-2.21-pyhd3eb1b0_0.tar.bz2";
|
||||
sha256 = "1dyi89xx73kq0caz4jx493czn16w0dl1gjhw0c5kw28bxz6i8wm8";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/noarch/wcwidth-0.2.5-pyhd3eb1b0_0.tar.bz2";
|
||||
sha256 = "1x3sncbrp7bml6qjss24qyy0rsjbdhnzjwpf6apcd14kzspnr21a";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/noarch/tzdata-2021e-hda174b7_0.tar.bz2";
|
||||
sha256 = "1sxgc0pamsskszm29cxpwzlffydxjr3aqpgly7j1f3ansvchxvb4";
|
||||
url = "https://conda.anaconda.org/conda-forge/noarch/prettytable-2.2.0-pyhd8ed1ab_0.tar.bz2";
|
||||
sha256 = "01jkhi7xsflsqsz66vva05z7ssal10gb3yhqzan21qh300ls1fww";
|
||||
})
|
||||
]
|
||||
|
|
|
|||
|
|
@ -1,68 +1,13 @@
|
|||
{ pkgs } : [
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/ca-certificates-2021.10.26-haa95532_2.tar.bz2";
|
||||
sha256 = "14zdv6whd7cw298mkwpgkfydpz6zwhjq6gvxpw5s77m9b8jyi08w";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/jpeg-9d-h2bbff1b_0.tar.bz2";
|
||||
sha256 = "0jdwx9bl89byaqi73h0wr9hkjdi0ia47izgj602xfzc8ylhg0fxl";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://conda.anaconda.org/conda-forge/win-64/python_abi-3.9-2_cp39.tar.bz2";
|
||||
sha256 = "04d9pbqzck0330jv7mi8x4r1883sv421lwai2p9yamr2yl6xpan0";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/certifi-2021.10.8-py39haa95532_0.tar.bz2";
|
||||
sha256 = "032gmb2lyd0kwb7cr1j90fqyb44aar9jnki9jzjp6p65lbckc27l";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/python-3.9.7-h6244533_1.tar.bz2";
|
||||
sha256 = "1pgnrci071wbjdsarjrjssqvbk6nr2hbsvwdvzvf255f33264jj3";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/pip-21.2.4-py39haa95532_0.tar.bz2";
|
||||
sha256 = "06a916f8fyjydy5rrrhvwjxn5jwr1w2b6dvhgpsa09bq4p1c2qid";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/regex-2021.8.3-py39h2bbff1b_0.tar.bz2";
|
||||
sha256 = "1p8kf8d2d3cb6z91fl2sjrn3mpaxb7pq1rc20705k1lqbjf9biga";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/mkl-2021.4.0-haa95532_640.tar.bz2";
|
||||
sha256 = "115zmm4n769xl442qmv5h2ik5fyc1hb8cm1hc5a1vyb7bqwj2xrx";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/setuptools-58.0.4-py39haa95532_0.tar.bz2";
|
||||
sha256 = "0avlsc1k3ms92panb24z5vas5gkfm9zxy0mh71pv7yqc466k2qc0";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/importlib-metadata-4.8.2-py39haa95532_0.tar.bz2";
|
||||
sha256 = "1fjr69ibknprp25742vzpbck6byrw84w2g3zxa5vqsyz7pyv27xb";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://conda.anaconda.org/numba/win-64/llvmlite-0.38.0rc1-py39_0.tar.bz2";
|
||||
sha256 = "0xmd338r5vl9f456cvmmf4s1bz1jxc3yv58050xqgifpkrx3z3vr";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/hdf5-1.10.6-h7ebc959_0.tar.bz2";
|
||||
sha256 = "09bik65gspyrqj3j5p67wf2ywhgyfz3pkw39gwdzha7yyjkkzx0q";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/intel-openmp-2021.4.0-haa95532_3556.tar.bz2";
|
||||
sha256 = "19mmjvcm7f8nzyk7djjsd9lf6qx01f35wrvmragv1fhzsis3ddgf";
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/python-3.9.6-h6244533_1.tar.bz2";
|
||||
sha256 = "0ak7zxfwqwwisd1m4km4lpx7v1nxfcbcj1jxkxplb8yv9178jb27";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
|
|
@ -71,53 +16,13 @@
|
|||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/numpy-base-1.21.2-py39h0829f74_0.tar.bz2";
|
||||
sha256 = "1x97k4kdvdwh0aahrpzfaypsf7zvxkqwn0xw7cph2p9fzk7j88zw";
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/cffi-1.14.6-py39h2bbff1b_0.tar.bz2";
|
||||
sha256 = "0g3kfqhr1075akd9llmaw19gc47qcafi8916r6770gmbjx3xhzyl";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://conda.anaconda.org/conda-forge/win-64/pygit2-1.7.2-py39hb82d6ee_0.tar.bz2";
|
||||
sha256 = "1l56b7x1mrha9fs4j2zw4f2c199ab0yw1yggdivjyn40xll9x2sd";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/openssl-1.1.1l-h2bbff1b_0.tar.bz2";
|
||||
sha256 = "1w37wciivy4dqa1gvkwq23myv7sk7vr4davarvxc9hjl2is3r4dm";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/sip-4.19.13-py39hd77b12b_0.tar.bz2";
|
||||
sha256 = "1p2wgpzy1ccya314m53qjqnw2wns7wj4lxv3lkmddx940f12i76r";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://conda.anaconda.org/conda-forge/win-64/libssh2-1.10.0-h680486a_2.tar.bz2";
|
||||
sha256 = "1nnzz9hxgj63gs48flj6pxq6nqz9gkx54gwibyq502za1rbhbyw6";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/python-levenshtein-0.12.2-py39h2bbff1b_0.tar.bz2";
|
||||
sha256 = "1y5g9l07whv614qyafkzbph30zi9kypxfswdxh0gknsih8941j0k";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/pyreadline-2.1-py39haa95532_1.tar.bz2";
|
||||
sha256 = "0581i2vp5b1dx7z9v4q41dd9ppj9bh9xgy0cnd7zd01zblafdbj5";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/h5py-3.6.0-py39h3de5c98_0.tar.bz2";
|
||||
sha256 = "0g6jw2c6qn4vzmn6k3yal8qxrdzcdzpx6grwq1mjxpamb11akni7";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://conda.anaconda.org/numba/win-64/icc_rt-2020.2-intel_254.tar.bz2";
|
||||
sha256 = "195km05did3n7zaljg7vwz11n8ibf935gk0m7dy07ngfk97s8w9f";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/lld-12.0.0-he71bc95_0.tar.bz2";
|
||||
sha256 = "0f6aw6d72w339jyqyjavnnsv35k2dc4pl79ymylczwf2my37rqpk";
|
||||
url = "https://conda.anaconda.org/conda-forge/win-64/pygit2-1.6.1-py39hb82d6ee_1.tar.bz2";
|
||||
sha256 = "16v0rmdsrf4q91sg9s3iwbi8lzx1fdvjmhgva36p1q35a6g1y9rx";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
|
|
@ -125,49 +30,89 @@
|
|||
sha256 = "05sbxqipw9cp2c4p5imadk4hc9ds1d25hys5vamjp6pnl6435ipk";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/ca-certificates-2021.7.5-haa95532_1.tar.bz2";
|
||||
sha256 = "1z8pwmcsjz66plcbsw4zz99l8bgfzw29z3lhrgm1xfn2c8isv0xp";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/pyqt-5.9.2-py39hd77b12b_6.tar.bz2";
|
||||
sha256 = "1v3qbmidh2h4vkzf5w8lisjc58z2714bbvaf0dg5m2k5vga4zh84";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/sip-4.19.13-py39hd77b12b_0.tar.bz2";
|
||||
sha256 = "1p2wgpzy1ccya314m53qjqnw2wns7wj4lxv3lkmddx940f12i76r";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/setuptools-52.0.0-py39haa95532_0.tar.bz2";
|
||||
sha256 = "1fi0s0jrbn9vldrbxmkvv056pa53yhnarx7jxlwfrj329b5691kb";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/mkl_fft-1.3.0-py39h277e83a_2.tar.bz2";
|
||||
sha256 = "0zj9fykn17bs962yj70slqqahjjzva87bpn5mkq72hw6knlmamyk";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://conda.anaconda.org/conda-forge/win-64/python_abi-3.9-2_cp39.tar.bz2";
|
||||
sha256 = "04d9pbqzck0330jv7mi8x4r1883sv421lwai2p9yamr2yl6xpan0";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/llvmlite-0.37.0-py39h23ce68f_0.tar.bz2";
|
||||
sha256 = "07gpfr2i4gcqra1hzzw18janlz13q4rjjffpcyw3fha7qq4hnic0";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/llvm-tools-12.0.0-h05d9aec_3.tar.bz2";
|
||||
sha256 = "0ly686hb730mvhw47xyz92dqchq46wkdaw1v2a6i0fzzdgf3ww9p";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/libxml2-2.9.12-h0ad7f3c_0.tar.bz2";
|
||||
sha256 = "0gm1ajhiwdk23cc62nkayqqwqcccxwzj01dmypycx5d6cbh46l9y";
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/regex-2021.8.3-py39h2bbff1b_0.tar.bz2";
|
||||
sha256 = "1p8kf8d2d3cb6z91fl2sjrn3mpaxb7pq1rc20705k1lqbjf9biga";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/wincertstore-0.2-py39haa95532_2.tar.bz2";
|
||||
sha256 = "0fvcgpmn13i9rxql4dvw8ybzj2vvck0fqsqk1qrgdl3zkh841f1z";
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/numpy-1.20.3-py39ha4e8547_0.tar.bz2";
|
||||
sha256 = "1hbnvppgv3jfwm9v4rqy00x4ya7gz8mi7csp651nkkb6gcqmq80j";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://conda.anaconda.org/conda-forge/win-64/libgit2-1.3.0-h8648793_1.tar.bz2";
|
||||
sha256 = "0gw71dk8a2b80822p44rarq5nqiww8g9braxvbxnwanam5wl5611";
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/python-levenshtein-0.12.2-py39h2bbff1b_0.tar.bz2";
|
||||
sha256 = "1y5g9l07whv614qyafkzbph30zi9kypxfswdxh0gknsih8941j0k";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/cffi-1.15.0-py39h2bbff1b_0.tar.bz2";
|
||||
sha256 = "1akbnswb1zigf1cx8im6s96rjmfryl4i20sg3xgaqy5papz926hf";
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/intel-openmp-2021.3.0-haa95532_3372.tar.bz2";
|
||||
sha256 = "1p0n1886nidch4341q8xzihy2p3jbqif9l69zmsdnaw517jgah1x";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/mkl_fft-1.3.1-py39h277e83a_0.tar.bz2";
|
||||
sha256 = "0i2v4vzwklvwp1n003yyr2hgpb1gjsh05ibsc92w0c5angf0s4wp";
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/wincertstore-0.2-py39h2bbff1b_0.tar.bz2";
|
||||
sha256 = "009hddqzk3x84hx7djygv59bawpykzr5wfc8l114w7fbz0p2qady";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/numpy-1.21.2-py39hfca59bb_0.tar.bz2";
|
||||
sha256 = "1f10ka0vyx319z3f51zfxfcbwipa3vscw175c6i2qsb9ynlihqi7";
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/pyreadline-2.1-py39haa95532_1.tar.bz2";
|
||||
sha256 = "0581i2vp5b1dx7z9v4q41dd9ppj9bh9xgy0cnd7zd01zblafdbj5";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/scipy-1.7.1-py39hbe87c03_2.tar.bz2";
|
||||
sha256 = "131xc7qr5lrfnxdy8p09y6gghx0h7wbaif2kq4r1jmmmm8pksjm6";
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/certifi-2021.5.30-py39haa95532_0.tar.bz2";
|
||||
sha256 = "1rya5gbzhs9dirkj71d2xm6aw41qkmvpjp0l6icg2nw5cspshlac";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/h5py-3.2.1-py39h3de5c98_0.tar.bz2";
|
||||
sha256 = "0qf5gncjll3hc0xi62nms6wvkk07f4fbx4dmn5m2jnmnn71nw6nv";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://conda.anaconda.org/conda-forge/win-64/libgit2-1.1.1-h8648793_1.tar.bz2";
|
||||
sha256 = "07x4dqxkrw9a692zrwb3032mf0f6azdsfjdji9cnsncwhf4z73rz";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
|
|
@ -175,8 +120,48 @@
|
|||
sha256 = "1k5396hvb4hbylcpnx4m7v7kggw9kn8j1w0v91lwzc3gv64q83l9";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/mkl-2021.3.0-haa95532_524.tar.bz2";
|
||||
sha256 = "1rhzaa9yc0nsf3nbmmgxl96xcygm9nrgcahljgb9fx84d7w001p2";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/pip-21.2.4-py38haa95532_0.tar.bz2";
|
||||
sha256 = "13bdyhag0558m8nhj3bs40rbagaqim9iwrzv7g6iycifkcvr26ry";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/scipy-1.7.1-py39hbe87c03_2.tar.bz2";
|
||||
sha256 = "131xc7qr5lrfnxdy8p09y6gghx0h7wbaif2kq4r1jmmmm8pksjm6";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/sqlite-3.36.0-h2bbff1b_0.tar.bz2";
|
||||
sha256 = "15w0lhcl97wafqvc6ccc96311wc5rrmh16i4ki1pw6kzkfmr1k6r";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/libxml2-2.9.12-h0ad7f3c_0.tar.bz2";
|
||||
sha256 = "0gm1ajhiwdk23cc62nkayqqwqcccxwzj01dmypycx5d6cbh46l9y";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/lld-12.0.0-he71bc95_0.tar.bz2";
|
||||
sha256 = "0f6aw6d72w339jyqyjavnnsv35k2dc4pl79ymylczwf2my37rqpk";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/importlib-metadata-3.10.0-py39haa95532_0.tar.bz2";
|
||||
sha256 = "164dxy80sd7b5zyl00x08kplf9zkyyvy3zshdif9i4fmnvfmsag3";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/numpy-base-1.20.3-py39hc2deb75_0.tar.bz2";
|
||||
sha256 = "13hkjh7dmc62wf3xl0fcry8gjaav0hrr41v7l3ksblxl8c0clv1g";
|
||||
})
|
||||
|
||||
(pkgs.fetchurl {
|
||||
url = "https://repo.anaconda.com/pkgs/main/win-64/openssl-1.1.1l-h2bbff1b_0.tar.bz2";
|
||||
sha256 = "1w37wciivy4dqa1gvkwq23myv7sk7vr4davarvxc9hjl2is3r4dm";
|
||||
})
|
||||
]
|
||||
|
|
|
|||
|
|
@ -23,10 +23,9 @@ in
|
|||
isolateNetwork = false;
|
||||
script = ''
|
||||
cat > getcondapackages.bat << EOF
|
||||
date 12-14-21
|
||||
date 08-22-21
|
||||
call conda config --prepend channels https://conda.m-labs.hk/artiq-beta
|
||||
call conda config --append channels conda-forge
|
||||
call conda config --prepend channels numba
|
||||
call conda create -n artiq -y
|
||||
call conda install --dry-run --json -n artiq artiq > packages.json
|
||||
EOF
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ let
|
|||
sinaraSystemsSrc =
|
||||
if use-generated
|
||||
then pkgs.fetchgit {
|
||||
url = "https://git.m-labs.hk/M-Labs/sinara-systems-legacy.git";
|
||||
url = "https://git.m-labs.hk/M-Labs/sinara-systems.git";
|
||||
rev = sinaraSystemsRev;
|
||||
sha256 = sinaraSystemsHash;
|
||||
}
|
||||
|
|
@ -112,7 +112,7 @@ let
|
|||
''};
|
||||
conda-artiq-board = import ./conda-artiq-board.nix { inherit pkgs; };
|
||||
src = pkgs.fetchgit {
|
||||
url = "https://git.m-labs.hk/M-Labs/sinara-systems-legacy.git";
|
||||
url = "https://git.m-labs.hk/M-Labs/sinara-systems.git";
|
||||
rev = "$REV";
|
||||
sha256 = "$HASH";
|
||||
};
|
||||
|
|
@ -147,9 +147,77 @@ let
|
|||
};
|
||||
})
|
||||
) {} ${serializedTargets};
|
||||
drtio-systems = {
|
||||
${pkgs.lib.optionalString use-generated ''
|
||||
ap = {
|
||||
master = "apmaster";
|
||||
satellites = {
|
||||
"1" = "apsatellite1";
|
||||
"2" = "apsatellite2";
|
||||
};
|
||||
};
|
||||
berkeley3 = {
|
||||
master = "berkeley3master";
|
||||
satellites = {
|
||||
"1" = "berkeley3satellite";
|
||||
};
|
||||
};
|
||||
ptb3 = {
|
||||
master = "ptb3master";
|
||||
satellites = {
|
||||
"1" = "ptb3satellite";
|
||||
};
|
||||
};
|
||||
purdue = {
|
||||
master = "purduemaster";
|
||||
satellites = {
|
||||
"1" = "purduesatellite";
|
||||
};
|
||||
};
|
||||
stfc = {
|
||||
master = "stfcmaster";
|
||||
satellites = {
|
||||
"1" = "stfcsatellite";
|
||||
};
|
||||
};
|
||||
ubirmingham3 = {
|
||||
master = "ubirmingham3master";
|
||||
satellites = {
|
||||
"1" = "ubirmingham3satellite";
|
||||
};
|
||||
};
|
||||
ustc5 = {
|
||||
master = "ustc5master";
|
||||
satellites = {
|
||||
"1" = "ustc5satellite";
|
||||
};
|
||||
};
|
||||
wipm7 = {
|
||||
master = "wipm7master";
|
||||
satellites = {
|
||||
"1" = "wipm7satellite";
|
||||
};
|
||||
};
|
||||
''}
|
||||
};
|
||||
drtio-ddbs = pkgs.lib.attrsets.mapAttrs'
|
||||
(system: crates: pkgs.lib.attrsets.nameValuePair ("device-db-" + system)
|
||||
(pkgs.stdenv.mkDerivation {
|
||||
name = "device-db-\''${system}";
|
||||
buildInputs = ddbDeps;
|
||||
phases = [ "buildPhase" ];
|
||||
buildPhase = "
|
||||
mkdir \$out
|
||||
artiq_ddb_template \
|
||||
\''${pkgs.lib.strings.concatStringsSep " " (pkgs.lib.attrsets.mapAttrsToList (dest: desc: "-s " + dest + " " + (src + "/\''${desc}.json")) crates.satellites) } \
|
||||
\''${src}/\''${crates.master}.json -o \$out/device_db.py
|
||||
mkdir \$out/nix-support
|
||||
echo file device_db_template \$out/device_db.py >> \$out/nix-support/hydra-build-products
|
||||
";
|
||||
})) drtio-systems;
|
||||
extras = import ./extras.nix { inherit pkgs; inherit (artiq-fast) sipyco asyncserial artiq; };
|
||||
in
|
||||
artiq-fast // artiq-targets // extras // rec {
|
||||
artiq-fast // artiq-targets // drtio-ddbs // extras // rec {
|
||||
conda-artiq-board-kasli-tester = conda-artiq-board {
|
||||
target = "kasli";
|
||||
variant = "tester";
|
||||
|
|
|
|||
|
|
@ -37,6 +37,16 @@ let
|
|||
);
|
||||
in
|
||||
kasli // {
|
||||
artiq-board-sayma-rtm = {
|
||||
target = "sayma";
|
||||
variant = "rtm";
|
||||
buildCommand = "python -m artiq.gateware.targets.sayma_rtm";
|
||||
};
|
||||
artiq-board-sayma-satellite = {
|
||||
target = "sayma";
|
||||
variant = "satellite";
|
||||
buildCommand = "python -m artiq.gateware.targets.sayma_amc";
|
||||
};
|
||||
artiq-board-metlino-master = {
|
||||
target = "metlino";
|
||||
variant = "master";
|
||||
|
|
@ -46,7 +56,13 @@ kasli // {
|
|||
target = "kc705";
|
||||
variant = "nist_qc2";
|
||||
};
|
||||
} // (pkgs.lib.optionalAttrs (pkgs.lib.strings.versionAtLeast artiqVersion "7.0") {
|
||||
} // (pkgs.lib.optionalAttrs (pkgs.lib.strings.versionAtLeast artiqVersion "6.0") {
|
||||
artiq-board-sayma-satellite-st = {
|
||||
target = "sayma";
|
||||
variant = "satellite";
|
||||
buildCommand = "python -m artiq.gateware.targets.sayma_amc --jdcg-type syncdds";
|
||||
};
|
||||
}) // (pkgs.lib.optionalAttrs (pkgs.lib.strings.versionAtLeast artiqVersion "7.0") {
|
||||
artiq-board-kc705-nist_clock_master = {
|
||||
target = "kc705";
|
||||
variant = "nist_clock_master";
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@ in
|
|||
artiq-full.novatech409b
|
||||
artiq-full.thorlabs_tcube
|
||||
artiq-full.artiq-board-kc705-nist_clock
|
||||
artiq-full.artiq-board-kasli-oregon
|
||||
ps.paramiko
|
||||
ps.pandas
|
||||
ps.numpy
|
||||
|
|
|
|||
|
|
@ -231,8 +231,8 @@ in
|
|||
withManual = false;
|
||||
src = pkgs.fetchgit {
|
||||
url = "https://gitlab.com/duke-artiq/flake8-artiq.git";
|
||||
rev = "1216092974140a561850905734fc22fdacdc2cde";
|
||||
sha256 = "0rkab2qdwyzms6nxc44jzb5grvkkbpjwwmfv2zj96cm6cm8d9pdr";
|
||||
rev = "e64475277bdeeb7bbdc8384c90bbd70a3f15e4cd";
|
||||
sha256 = "0zmpm39vzi4f8jd50p569d3sgcda3alkg8xgb8jmr0m8yw1kv5hs";
|
||||
};
|
||||
pythonOptions = {
|
||||
propagatedBuildInputs = [ pkgs.python3Packages.flake8 ];
|
||||
|
|
@ -241,30 +241,30 @@ in
|
|||
condaOptions = { dependencies = [ "flake8" ]; };
|
||||
}) // (dualPackage rec {
|
||||
name = "dax";
|
||||
version = "6.7";
|
||||
version = "6.5";
|
||||
enabled = builtins.head (builtins.splitVersion version) == builtins.head (builtins.splitVersion artiq.version);
|
||||
withManual = false;
|
||||
src = pkgs.fetchgit {
|
||||
url = "https://gitlab.com/duke-artiq/dax.git";
|
||||
rev = "v${version}";
|
||||
sha256 = "0rgvqqiypqvxjzrsixn3h7dn93isqw5vc2wrmpkxhzvw9lh5ihm7";
|
||||
sha256 = "1za7n59ya175w1y6gfx0zf4cayizz5m9gd1mf93bkycwx7pyhn4a";
|
||||
};
|
||||
pythonOptions = {
|
||||
VERSIONEER_OVERRIDE = version;
|
||||
inherit (pkgs.python3Packages.pygit2) SSL_CERT_FILE;
|
||||
propagatedBuildInputs = [ artiq sipyco ]
|
||||
++ (with pkgs.python3Packages; [ numpy scipy pyvcd natsort pygit2 matplotlib graphviz h5py networkx sortedcontainers ]);
|
||||
++ (with pkgs.python3Packages; [ numpy scipy pyvcd natsort pygit2 matplotlib graphviz h5py networkx ]);
|
||||
checkInputs = [ pkgs.python3Packages.pytestCheckHook ];
|
||||
};
|
||||
condaOptions = { dependencies = [ "python>=3.7" "artiq" "sipyco" "numpy" "scipy" "pyvcd" "natsort" "pygit2" "matplotlib" "python-graphviz" "h5py" "networkx" "sortedcontainers" ]; };
|
||||
condaOptions = { dependencies = [ "python>=3.7" "artiq" "sipyco" "numpy" "scipy" "pyvcd" "natsort" "pygit2" "matplotlib" "python-graphviz" "h5py" "networkx" ]; };
|
||||
}) // (dualPackage {
|
||||
name = "dax-applets";
|
||||
version = "0.0.0";
|
||||
withManual = false;
|
||||
src = pkgs.fetchgit {
|
||||
url = "https://gitlab.com/duke-artiq/dax-applets.git";
|
||||
rev = "0f0196b6941b0c44a33c85d8c02047ca65466463";
|
||||
sha256 = "0mx6yjvprhdnkdigwns8mg6v5daqxpgbv7mf63fa76i1iv2wvak4";
|
||||
rev = "11b7e6007825e61b61ae9f5994ffd9951c21ea6f";
|
||||
sha256 = "1jzpgxbx1cfwc784in0fbsga48589cpb8cdb7lbq5w31v0wpjbm4";
|
||||
};
|
||||
pythonOptions = {
|
||||
propagatedBuildInputs = [ artiq ]
|
||||
|
|
|
|||
|
|
@ -1,7 +1,12 @@
|
|||
let
|
||||
pkgs = import <nixpkgs> { overlays = [ (import ./artiq-fast/mozilla-overlay.nix) ]; };
|
||||
pkgs = import <nixpkgs> {};
|
||||
artiq-zynq = import <artiq-zynq>;
|
||||
artiq-fast = import <artiq-fast> { inherit pkgs; };
|
||||
|
||||
zynq-rs = import artiq-zynq.zynq-rs;
|
||||
# New zynq-rs versions with Kasli-SoC support have the multiboard "szl" package.
|
||||
# Older versions need the SZL environment variable set to the SZL ELF to be loaded.
|
||||
szlEnv = if zynq-rs ? "szl" then "${zynq-rs.szl}" else "${zynq-rs.zc706-szl}/szl.elf";
|
||||
in
|
||||
(
|
||||
builtins.mapAttrs (key: value: pkgs.lib.hydraJob value) artiq-zynq
|
||||
|
|
@ -21,9 +26,8 @@ in
|
|||
zc706-hitl-tests = pkgs.lib.hydraJob (pkgs.stdenv.mkDerivation {
|
||||
name = "zc706-hitl-tests";
|
||||
|
||||
__networked = true; # compatibility with old patched Nix
|
||||
# breaks hydra, https://github.com/NixOS/hydra/issues/1216
|
||||
#__impure = true; # Nix 2.8+
|
||||
# requires patched Nix
|
||||
__networked = true;
|
||||
|
||||
buildInputs = [
|
||||
pkgs.netcat pkgs.openssh pkgs.rsync artiq-fast.artiq artiq-fast.artiq-netboot
|
||||
|
|
@ -32,7 +36,7 @@ in
|
|||
|
||||
buildPhase =
|
||||
''
|
||||
export NIX_SSHOPTS="-F /dev/null -o StrictHostKeyChecking=no -o UserKnownHostsFile=/dev/null -o LogLevel=ERROR -i /opt/hydra_id_ed25519"
|
||||
export NIX_SSHOPTS="-F /dev/null -o StrictHostKeyChecking=no -o UserKnownHostsFile=/dev/null -o LogLevel=ERROR -i /opt/hydra_id_rsa"
|
||||
LOCKCTL=$(mktemp -d)
|
||||
mkfifo $LOCKCTL/lockctl
|
||||
|
||||
|
|
@ -56,7 +60,7 @@ in
|
|||
|
||||
export USER=hydra
|
||||
export OPENOCD_ZYNQ=${artiq-zynq.zynq-rs}/openocd
|
||||
export SZL=${(import artiq-zynq.zynq-rs).zc706-szl}/szl.elf
|
||||
export SZL=${szlEnv}
|
||||
pushd ${<artiq-zynq>}
|
||||
bash ${<artiq-zynq>}/remote_run.sh -h rpi-4 -o "$NIX_SSHOPTS" -d ${artiq-zynq.zc706-nist_qc2-jtag}
|
||||
popd
|
||||
|
|
|
|||
259
hydra/artiq.json
259
hydra/artiq.json
|
|
@ -1,101 +1,93 @@
|
|||
{
|
||||
"main-nac3": {
|
||||
"fast-beta": {
|
||||
"enabled": 1,
|
||||
"type": 1,
|
||||
"hidden": false,
|
||||
"description": "Main ARTIQ packages (with NAC3)",
|
||||
"flake": "git+https://github.com/m-labs/artiq.git?ref=nac3",
|
||||
"description": "Core ARTIQ packages to build fast for CI purposes (beta version)",
|
||||
"nixexprinput": "nixScripts",
|
||||
"nixexprpath": "artiq-fast.nix",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 10,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 50
|
||||
"keepnr": 50,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"artiqSrc": { "type": "git", "value": "git://github.com/m-labs/artiq.git master 1", "emailresponsible": false }
|
||||
}
|
||||
},
|
||||
"nac3": {
|
||||
"full-beta": {
|
||||
"enabled": 1,
|
||||
"type": 1,
|
||||
"hidden": false,
|
||||
"description": "Third generation ARTIQ compiler",
|
||||
"flake": "git+https://git.m-labs.hk/M-Labs/nac3.git",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 10,
|
||||
"description": "Full set of ARTIQ packages (beta version)",
|
||||
"nixexprinput": "nixScripts",
|
||||
"nixexprpath": "artiq-full.nix",
|
||||
"checkinterval": 86400,
|
||||
"schedulingshares": 1,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 50
|
||||
"keepnr": 50,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"use-generated": { "type": "boolean", "value": "false" },
|
||||
"sinaraSystemsSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/sinara-systems.git master 1", "emailresponsible": false },
|
||||
"artiq-fast": { "type": "sysbuild", "value": "artiq:fast-beta:generated-nix", "emailresponsible": false }
|
||||
}
|
||||
},
|
||||
|
||||
"main-beta": {
|
||||
"fast": {
|
||||
"enabled": 1,
|
||||
"type": 1,
|
||||
"hidden": false,
|
||||
"description": "Main ARTIQ packages (beta version)",
|
||||
"flake": "git+https://github.com/m-labs/artiq.git",
|
||||
"description": "Core ARTIQ packages to build fast for CI purposes",
|
||||
"nixexprinput": "nixScripts",
|
||||
"nixexprpath": "artiq-fast.nix",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 10,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 50
|
||||
"keepnr": 50,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"artiqSrc": { "type": "git", "value": "git://github.com/m-labs/artiq.git release-6 1", "emailresponsible": false }
|
||||
}
|
||||
},
|
||||
"extra-beta": {
|
||||
"board-generated": {
|
||||
"enabled": 1,
|
||||
"type": 1,
|
||||
"hidden": false,
|
||||
"description": "Additional ARTIQ packages (beta version)",
|
||||
"flake": "git+https://git.m-labs.hk/m-labs/artiq-extrapkg.git",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 10,
|
||||
"description": "Generated code for ARTIQ boards (ARTIQ 6 only)",
|
||||
"nixexprinput": "nixScripts",
|
||||
"nixexprpath": "artiq-board-generated",
|
||||
"checkinterval": 14400,
|
||||
"schedulingshares": 1,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 50
|
||||
"keepnr": 50,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"sinaraSystemsSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/sinara-systems.git master 1", "emailresponsible": false },
|
||||
"artiq-fast": { "type": "sysbuild", "value": "artiq:fast:generated-nix", "emailresponsible": false }
|
||||
}
|
||||
},
|
||||
"zynq-beta": {
|
||||
"full": {
|
||||
"enabled": 1,
|
||||
"type": 1,
|
||||
"hidden": false,
|
||||
"description": "ARTIQ on Zynq-7000 (beta version)",
|
||||
"flake": "git+https://git.m-labs.hk/m-labs/artiq-zynq.git",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 10,
|
||||
"description": "Full set of ARTIQ packages",
|
||||
"nixexprinput": "nixScripts",
|
||||
"nixexprpath": "artiq-full.nix",
|
||||
"checkinterval": 86400,
|
||||
"schedulingshares": 1,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 50
|
||||
},
|
||||
|
||||
"main": {
|
||||
"enabled": 1,
|
||||
"type": 1,
|
||||
"hidden": false,
|
||||
"description": "Main ARTIQ packages (stable version)",
|
||||
"flake": "git+https://github.com/m-labs/artiq.git?ref=release-7",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 10,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 50
|
||||
},
|
||||
"extra": {
|
||||
"enabled": 1,
|
||||
"type": 1,
|
||||
"hidden": false,
|
||||
"description": "Additional ARTIQ packages (stable version)",
|
||||
"flake": "git+https://git.m-labs.hk/m-labs/artiq-extrapkg.git?ref=release-7",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 10,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 50
|
||||
},
|
||||
"zynq": {
|
||||
"enabled": 1,
|
||||
"type": 1,
|
||||
"hidden": false,
|
||||
"description": "ARTIQ on Zynq-7000 (stable version)",
|
||||
"flake": "git+https://git.m-labs.hk/m-labs/artiq-zynq.git?ref=release-7",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 10,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 50
|
||||
"keepnr": 50,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"use-generated": { "type": "boolean", "value": "true" },
|
||||
"artiq-board-generated": { "type": "sysbuild", "value": "artiq:board-generated:generated-nix", "emailresponsible": false }
|
||||
}
|
||||
},
|
||||
|
||||
"fast-legacy": {
|
||||
|
|
@ -110,27 +102,9 @@
|
|||
"emailoverride": "",
|
||||
"keepnr": 50,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.05", "emailresponsible": false },
|
||||
"nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"artiqSrc": { "type": "git", "value": "https://github.com/m-labs/artiq.git release-6 1", "emailresponsible": false }
|
||||
}
|
||||
},
|
||||
"board-generated-legacy": {
|
||||
"enabled": 1,
|
||||
"hidden": false,
|
||||
"description": "Generated code for ARTIQ boards (legacy version)",
|
||||
"nixexprinput": "nixScripts",
|
||||
"nixexprpath": "artiq-board-generated",
|
||||
"checkinterval": 14400,
|
||||
"schedulingshares": 1,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 50,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.05", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"sinaraSystemsSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/sinara-systems-legacy.git master 1", "emailresponsible": false },
|
||||
"artiq-fast": { "type": "sysbuild", "value": "artiq:fast-legacy:generated-nix", "emailresponsible": false }
|
||||
"artiqSrc": { "type": "git", "value": "git://github.com/m-labs/artiq.git release-5 1", "emailresponsible": false }
|
||||
}
|
||||
},
|
||||
"full-legacy": {
|
||||
|
|
@ -145,29 +119,25 @@
|
|||
"emailoverride": "",
|
||||
"keepnr": 50,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.05", "emailresponsible": false },
|
||||
"nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"use-generated": { "type": "boolean", "value": "true" },
|
||||
"artiq-board-generated": { "type": "sysbuild", "value": "artiq:board-generated-legacy:generated-nix", "emailresponsible": false }
|
||||
"sinaraSystemsSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/sinara-systems.git master 1", "emailresponsible": false },
|
||||
"use-generated": { "type": "boolean", "value": "false" },
|
||||
"artiq-fast": { "type": "sysbuild", "value": "artiq:fast-legacy:generated-nix", "emailresponsible": false }
|
||||
}
|
||||
},
|
||||
"zynq-legacy": {
|
||||
|
||||
"fast-flakes": {
|
||||
"enabled": 1,
|
||||
"type": 1,
|
||||
"hidden": false,
|
||||
"description": "ARTIQ on Zynq-7000 (legacy version)",
|
||||
"nixexprinput": "nixScripts",
|
||||
"nixexprpath": "artiq-zynq.nix",
|
||||
"description": "Core ARTIQ packages to build fast for CI purposes (Nix flakes version)",
|
||||
"flake": "github:m-labs/artiq",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 1,
|
||||
"schedulingshares": 10,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 50,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.05", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"artiq-fast": { "type": "sysbuild", "value": "artiq:fast-legacy:generated-nix", "emailresponsible": false },
|
||||
"artiq-zynq": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/artiq-zynq.git release-6", "emailresponsible": false }
|
||||
}
|
||||
"keepnr": 50
|
||||
},
|
||||
|
||||
"gluelogic": {
|
||||
|
|
@ -182,37 +152,78 @@
|
|||
"emailoverride": "",
|
||||
"keepnr": 50,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-21.05", "emailresponsible": false },
|
||||
"nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"urukulSrc": { "type": "git", "value": "https://github.com/quartiq/urukul.git", "emailresponsible": false },
|
||||
"mirnySrc": { "type": "git", "value": "https://github.com/quartiq/mirny.git", "emailresponsible": false },
|
||||
"fastinoSrc": { "type": "git", "value": "https://github.com/quartiq/fastino.git", "emailresponsible": false },
|
||||
"phaserSrc": { "type": "git", "value": "https://github.com/quartiq/phaser.git", "emailresponsible": false }
|
||||
"urukulSrc": { "type": "git", "value": "git://github.com/quartiq/urukul", "emailresponsible": false },
|
||||
"mirnySrc": { "type": "git", "value": "git://github.com/quartiq/mirny", "emailresponsible": false },
|
||||
"fastinoSrc": { "type": "git", "value": "git://github.com/quartiq/fastino", "emailresponsible": false },
|
||||
"phaserSrc": { "type": "git", "value": "git://github.com/quartiq/phaser", "emailresponsible": false }
|
||||
}
|
||||
},
|
||||
|
||||
"sipyco": {
|
||||
"enabled": 1,
|
||||
"type": 1,
|
||||
"hidden": false,
|
||||
"description": "Simple Python Communications",
|
||||
"flake": "github:m-labs/sipyco",
|
||||
"checkinterval": 600,
|
||||
"schedulingshares": 10,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 50
|
||||
},
|
||||
"zynq-rs": {
|
||||
"enabled": 1,
|
||||
"type": 1,
|
||||
"hidden": false,
|
||||
"description": "Bare-metal Rust on Zynq-7000",
|
||||
"flake": "git+https://git.m-labs.hk/m-labs/zynq-rs.git",
|
||||
"nixexprinput": "nixScripts",
|
||||
"nixexprpath": "zynq-rs.nix",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 10,
|
||||
"schedulingshares": 1,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 50
|
||||
"keepnr": 50,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"zynq-rs": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/zynq-rs.git", "emailresponsible": false },
|
||||
|
||||
"gitea_repo_name": { "value": "zynq-rs", "type": "string" },
|
||||
"gitea_repo_owner": { "value": "M-Labs", "type": "string" },
|
||||
"gitea_status_repo": { "value": "zynq-rs", "type": "string" }
|
||||
}
|
||||
},
|
||||
"zynq-beta": {
|
||||
"enabled": 1,
|
||||
"hidden": false,
|
||||
"description": "ARTIQ on Zynq-7000 (beta version)",
|
||||
"nixexprinput": "nixScripts",
|
||||
"nixexprpath": "artiq-zynq.nix",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 1,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 50,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"artiq-fast": { "type": "sysbuild", "value": "artiq:fast-beta:generated-nix", "emailresponsible": false },
|
||||
"artiq-zynq": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/artiq-zynq.git", "emailresponsible": false },
|
||||
|
||||
"gitea_repo_name": { "value": "artiq-zynq", "type": "string" },
|
||||
"gitea_repo_owner": { "value": "M-Labs", "type": "string" },
|
||||
"gitea_status_repo": { "value": "artiq-zynq", "type": "string" }
|
||||
}
|
||||
},
|
||||
"zynq": {
|
||||
"enabled": 1,
|
||||
"hidden": false,
|
||||
"description": "ARTIQ on Zynq-7000",
|
||||
"nixexprinput": "nixScripts",
|
||||
"nixexprpath": "artiq-zynq.nix",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 1,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 50,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"artiq-fast": { "type": "sysbuild", "value": "artiq:fast:generated-nix", "emailresponsible": false },
|
||||
"artiq-zynq": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/artiq-zynq.git release-6", "emailresponsible": false },
|
||||
|
||||
"gitea_repo_name": { "value": "artiq-zynq", "type": "string" },
|
||||
"gitea_repo_owner": { "value": "M-Labs", "type": "string" },
|
||||
"gitea_status_repo": { "value": "artiq-zynq", "type": "string" }
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,45 +1,23 @@
|
|||
{
|
||||
"mcu-contrib": {
|
||||
"mcu": {
|
||||
"enabled": 1,
|
||||
"hidden": false,
|
||||
"description": "Third-party MCU firmware",
|
||||
"description": "MCU firmware",
|
||||
"nixexprinput": "nixScripts",
|
||||
"nixexprpath": "mcu-contrib.nix",
|
||||
"checkinterval": 7200,
|
||||
"nixexprpath": "mcu.nix",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 10,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 10,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-23.11", "emailresponsible": false },
|
||||
"mozillaOverlay": { "type": "git", "value": "https://github.com/mozilla/nixpkgs-mozilla.git", "emailresponsible": false },
|
||||
"nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
|
||||
"mozillaOverlay": { "type": "git", "value": "git://github.com/mozilla/nixpkgs-mozilla.git", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"stabilizerSrc": { "type": "git", "value": "https://github.com/quartiq/stabilizer.git", "emailresponsible": false },
|
||||
"saymaMmcSrc": { "type": "git", "value": "https://github.com/sinara-hw/openMMC.git sayma-devel", "emailresponsible": false }
|
||||
"stabilizerSrc": { "type": "git", "value": "git://github.com/HarryMakes/stabilizer.git pre-mqtt 1", "emailresponsible": false },
|
||||
"thermostatSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/thermostat.git", "emailresponsible": false },
|
||||
"humpbackDdsSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/humpback-dds.git", "emailresponsible": false },
|
||||
"saymaMmcSrc": { "type": "git", "value": "git://github.com/sinara-hw/openMMC sayma-devel", "emailresponsible": false }
|
||||
}
|
||||
},
|
||||
"thermostat": {
|
||||
"enabled": 1,
|
||||
"type": 1,
|
||||
"hidden": false,
|
||||
"description": "Firmware for the Sinara 8451 Thermostat",
|
||||
"flake": "git+https://git.m-labs.hk/M-Labs/thermostat.git",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 10,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 10
|
||||
},
|
||||
"humpback-dds": {
|
||||
"enabled": 1,
|
||||
"type": 1,
|
||||
"hidden": false,
|
||||
"description": "Firmware for Humpback-DDS",
|
||||
"flake": "git+https://git.m-labs.hk/M-Labs/humpback-dds.git",
|
||||
"checkinterval": 300,
|
||||
"schedulingshares": 10,
|
||||
"enableemail": false,
|
||||
"emailoverride": "",
|
||||
"keepnr": 10
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
"web": {
|
||||
"enabled": 1,
|
||||
"hidden": false,
|
||||
"description": "Websites",
|
||||
"description": "M-Labs website",
|
||||
"nixexprinput": "nixScripts",
|
||||
"nixexprpath": "web.nix",
|
||||
"checkinterval": 300,
|
||||
|
|
@ -11,10 +11,9 @@
|
|||
"emailoverride": "",
|
||||
"keepnr": 10,
|
||||
"inputs": {
|
||||
"nixpkgs": { "type": "git", "value": "https://github.com/NixOS/nixpkgs.git nixos-23.11", "emailresponsible": false },
|
||||
"nixpkgs": { "type": "git", "value": "git://github.com/NixOS/nixpkgs nixos-21.05", "emailresponsible": false },
|
||||
"nixScripts": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/nix-scripts.git", "emailresponsible": false },
|
||||
"webSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/web2019.git", "emailresponsible": false },
|
||||
"nmigenSrc": { "type": "git", "value": "https://gitlab.com/nmigen/nmigen.git", "emailresponsible": false }
|
||||
"webSrc": { "type": "git", "value": "https://git.m-labs.hk/M-Labs/web2019.git", "emailresponsible": false }
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,104 +0,0 @@
|
|||
{ # Use master branch of the overlay by default
|
||||
mozillaOverlay ? import (builtins.fetchTarball https://github.com/mozilla/nixpkgs-mozilla/archive/master.tar.gz),
|
||||
}:
|
||||
|
||||
let
|
||||
pkgs = import <nixpkgs> { overlays = [ mozillaOverlay ]; };
|
||||
targets = [
|
||||
"thumbv7em-none-eabihf"
|
||||
];
|
||||
rustManifest = pkgs.fetchurl {
|
||||
url = "https://static.rust-lang.org/dist/2022-11-03/channel-rust-stable.toml";
|
||||
sha256 = "sha256-DzNEaW724O8/B8844tt5AVHmSjSQ3cmzlU4BP90oRlY=";
|
||||
};
|
||||
rustChannelOfTargets = _channel: _date: targets:
|
||||
(pkgs.lib.rustLib.fromManifestFile rustManifest {
|
||||
inherit (pkgs) stdenv lib fetchurl patchelf;
|
||||
}).rust.override {
|
||||
inherit targets;
|
||||
extensions = ["rust-src"];
|
||||
};
|
||||
rust = rustChannelOfTargets "nightly" null targets;
|
||||
rustPlatform = pkgs.recurseIntoAttrs (pkgs.makeRustPlatform {
|
||||
rustc = rust;
|
||||
cargo = rust;
|
||||
});
|
||||
|
||||
buildStm32Firmware = { name, src, cargoDepsName ? name, patchPhase ? "", extraNativeBuildInputs ? [], checkPhase ? "", doCheck ? true, binaryName ? name, extraCargoBuildArgs ? "", outputHashes ? {} }:
|
||||
rustPlatform.buildRustPackage rec {
|
||||
inherit name cargoDepsName;
|
||||
version = "0.0.0";
|
||||
|
||||
inherit src;
|
||||
|
||||
cargoLock = {lockFile = "${src}/Cargo.lock"; inherit outputHashes; };
|
||||
|
||||
inherit patchPhase;
|
||||
nativeBuildInputs = [ pkgs.llvm ] ++ extraNativeBuildInputs;
|
||||
buildPhase = ''
|
||||
export CARGO_HOME=$(mktemp -d cargo-home.XXX)
|
||||
cargo build --release --bin ${binaryName} ${extraCargoBuildArgs}
|
||||
'';
|
||||
|
||||
inherit checkPhase doCheck;
|
||||
# binaryName defaults to the `name` arg (i.e. the Rust package name);
|
||||
# it is used as the Cargo binary filename
|
||||
installPhase = ''
|
||||
mkdir -p $out $out/nix-support
|
||||
cp target/thumbv7em-none-eabihf/release/${binaryName} $out/${name}.elf
|
||||
echo file binary-dist $out/${name}.elf >> $out/nix-support/hydra-build-products
|
||||
llvm-objcopy -O binary target/thumbv7em-none-eabihf/release/${binaryName} $out/${name}.bin
|
||||
echo file binary-dist $out/${name}.bin >> $out/nix-support/hydra-build-products
|
||||
'';
|
||||
|
||||
dontFixup = true;
|
||||
auditable = false;
|
||||
};
|
||||
in
|
||||
pkgs.lib.attrsets.mapAttrs'
|
||||
(name: value: pkgs.lib.attrsets.nameValuePair ("stabilizer-" + name)
|
||||
(buildStm32Firmware ({
|
||||
name = "stabilizer-" + name;
|
||||
# If binaryName is not specified, use the attribute name as binaryName by default.
|
||||
binaryName = name;
|
||||
cargoDepsName = "stabilizer";
|
||||
src = <stabilizerSrc>;
|
||||
patchPhase = ''
|
||||
patch -p1 < ${./pounder-725.diff}
|
||||
substituteInPlace src/net/mod.rs \
|
||||
--replace "[10, 34, 16, 10];" \
|
||||
"[192, 168, 1, 10];" # or other default MQTT broker address
|
||||
'';
|
||||
doCheck = false;
|
||||
} // value))) {
|
||||
dual-iir = {};
|
||||
dual-iir-pounder_v1_0 = {
|
||||
binaryName = "dual-iir";
|
||||
extraCargoBuildArgs = "--features pounder_v1_0";
|
||||
};
|
||||
lockin = {};
|
||||
} //
|
||||
{
|
||||
# openMMC build system breaks if host compiler is not available, so do not use stdenvNoCC here
|
||||
sayma-mmc = pkgs.stdenv.mkDerivation {
|
||||
name = "sayma-mmc";
|
||||
src = <saymaMmcSrc>;
|
||||
phases = [ "unpackPhase" "buildPhase" "installPhase" ];
|
||||
nativeBuildInputs = [ pkgs.cmake pkgs.gcc-arm-embedded ];
|
||||
buildPhase =
|
||||
''
|
||||
mkdir build
|
||||
cd build
|
||||
cmake .. -DBOARD=sayma -DBOARD_RTM=sayma -DVERSION= -DTARGET_CONTROLLER=LPC1776 -DCMAKE_BUILD_TYPE=Debug
|
||||
make
|
||||
'';
|
||||
installPhase =
|
||||
''
|
||||
mkdir $out
|
||||
cp out/* $out
|
||||
mkdir -p $out $out/nix-support
|
||||
echo file binary-dist $out/openMMC.axf >> $out/nix-support/hydra-build-products
|
||||
echo file binary-dist $out/openMMC.bin >> $out/nix-support/hydra-build-products
|
||||
'';
|
||||
};
|
||||
}
|
||||
|
|
@ -1,819 +0,0 @@
|
|||
diff --git a/ad9959/src/lib.rs b/ad9959/src/lib.rs
|
||||
index b15f2a5bd..4e83bcb2f 100644
|
||||
--- a/ad9959/src/lib.rs
|
||||
+++ b/ad9959/src/lib.rs
|
||||
@@ -2,8 +2,24 @@
|
||||
|
||||
use bit_field::BitField;
|
||||
use bitflags::bitflags;
|
||||
+use core::ops::Range;
|
||||
use embedded_hal::{blocking::delay::DelayUs, digital::v2::OutputPin};
|
||||
|
||||
+/// The minimum reference clock input frequency with REFCLK multiplier disabled.
|
||||
+const MIN_REFCLK_FREQUENCY: f32 = 1e6;
|
||||
+/// The minimum reference clock input frequency with REFCLK multiplier enabled.
|
||||
+const MIN_MULTIPLIED_REFCLK_FREQUENCY: f32 = 10e6;
|
||||
+/// The system clock frequency range with high gain configured for the internal VCO.
|
||||
+const HIGH_GAIN_VCO_RANGE: Range<f32> = Range {
|
||||
+ start: 255e6,
|
||||
+ end: 500e6,
|
||||
+};
|
||||
+/// The system clock frequency range with low gain configured for the internal VCO.
|
||||
+const LOW_GAIN_VCO_RANGE: Range<f32> = Range {
|
||||
+ start: 100e6,
|
||||
+ end: 160e6,
|
||||
+};
|
||||
+
|
||||
/// A device driver for the AD9959 direct digital synthesis (DDS) chip.
|
||||
///
|
||||
/// This chip provides four independently controllable digital-to-analog output sinusoids with
|
||||
@@ -216,23 +232,17 @@ impl<I: Interface> Ad9959<I> {
|
||||
reference_clock_frequency: f32,
|
||||
multiplier: u8,
|
||||
) -> Result<f32, Error> {
|
||||
+ let frequency =
|
||||
+ validate_clocking(reference_clock_frequency, multiplier)?;
|
||||
self.reference_clock_frequency = reference_clock_frequency;
|
||||
|
||||
- if multiplier != 1 && !(4..=20).contains(&multiplier) {
|
||||
- return Err(Error::Bounds);
|
||||
- }
|
||||
-
|
||||
- let frequency = multiplier as f32 * self.reference_clock_frequency;
|
||||
- if frequency > 500_000_000.0f32 {
|
||||
- return Err(Error::Frequency);
|
||||
- }
|
||||
-
|
||||
// TODO: Update / disable any enabled channels?
|
||||
let mut fr1: [u8; 3] = [0, 0, 0];
|
||||
self.read(Register::FR1, &mut fr1)?;
|
||||
fr1[0].set_bits(2..=6, multiplier);
|
||||
|
||||
- let vco_range = frequency > 255e6;
|
||||
+ let vco_range = HIGH_GAIN_VCO_RANGE.contains(&frequency)
|
||||
+ || frequency == HIGH_GAIN_VCO_RANGE.end;
|
||||
fr1[0].set_bit(7, vco_range);
|
||||
|
||||
self.write(Register::FR1, &fr1)?;
|
||||
@@ -363,9 +373,7 @@ impl<I: Interface> Ad9959<I> {
|
||||
channel: Channel,
|
||||
phase_turns: f32,
|
||||
) -> Result<f32, Error> {
|
||||
- let phase_offset: u16 =
|
||||
- (phase_turns * (1 << 14) as f32) as u16 & 0x3FFFu16;
|
||||
-
|
||||
+ let phase_offset = phase_to_pow(phase_turns)?;
|
||||
self.modify_channel(
|
||||
channel,
|
||||
Register::CPOW0,
|
||||
@@ -511,6 +519,108 @@ impl<I: Interface> Ad9959<I> {
|
||||
}
|
||||
}
|
||||
|
||||
+/// Validate the internal system clock configuration of the chip.
|
||||
+///
|
||||
+/// Arguments:
|
||||
+/// * `reference_clock_frequency` - The reference clock frequency provided to the AD9959 core.
|
||||
+/// * `multiplier` - The frequency multiplier of the system clock. Must be 1 or 4-20.
|
||||
+///
|
||||
+/// Returns:
|
||||
+/// The system clock frequency to be configured.
|
||||
+pub fn validate_clocking(
|
||||
+ reference_clock_frequency: f32,
|
||||
+ multiplier: u8,
|
||||
+) -> Result<f32, Error> {
|
||||
+ // The REFCLK frequency must be at least 1 MHz with REFCLK multiplier disabled.
|
||||
+ if reference_clock_frequency < MIN_REFCLK_FREQUENCY {
|
||||
+ return Err(Error::Bounds);
|
||||
+ }
|
||||
+ // If the REFCLK multiplier is enabled, the multiplier (FR1[22:18]) must be between 4 to 20.
|
||||
+ // Alternatively, the clock multiplier can be disabled. The multiplication factor is 1.
|
||||
+ if multiplier != 1 && !(4..=20).contains(&multiplier) {
|
||||
+ return Err(Error::Bounds);
|
||||
+ }
|
||||
+ // If the REFCLK multiplier is enabled, the REFCLK frequency must be at least 10 MHz.
|
||||
+ if multiplier != 1
|
||||
+ && reference_clock_frequency < MIN_MULTIPLIED_REFCLK_FREQUENCY
|
||||
+ {
|
||||
+ return Err(Error::Bounds);
|
||||
+ }
|
||||
+ let frequency = multiplier as f32 * reference_clock_frequency;
|
||||
+ // SYSCLK frequency between 255 MHz and 500 MHz (inclusive) is valid with high range VCO
|
||||
+ if HIGH_GAIN_VCO_RANGE.contains(&frequency)
|
||||
+ || frequency == HIGH_GAIN_VCO_RANGE.end
|
||||
+ {
|
||||
+ return Ok(frequency);
|
||||
+ }
|
||||
+
|
||||
+ // SYSCLK frequency between 100 MHz and 160 MHz (inclusive) is valid with low range VCO
|
||||
+ if LOW_GAIN_VCO_RANGE.contains(&frequency)
|
||||
+ || frequency == LOW_GAIN_VCO_RANGE.end
|
||||
+ {
|
||||
+ return Ok(frequency);
|
||||
+ }
|
||||
+
|
||||
+ // When the REFCLK multiplier is disabled, SYSCLK frequency can go below 100 MHz
|
||||
+ if multiplier == 1 && (0.0..=LOW_GAIN_VCO_RANGE.start).contains(&frequency)
|
||||
+ {
|
||||
+ return Ok(frequency);
|
||||
+ }
|
||||
+
|
||||
+ Err(Error::Frequency)
|
||||
+}
|
||||
+
|
||||
+/// Convert and validate frequency into frequency tuning word.
|
||||
+///
|
||||
+/// Arguments:
|
||||
+/// * `dds_frequency` - The DDS frequency to be converted and validated.
|
||||
+/// * `system_clock_frequency` - The system clock frequency of the AD9959 core.
|
||||
+///
|
||||
+/// Returns:
|
||||
+/// The corresponding frequency tuning word.
|
||||
+pub fn frequency_to_ftw(
|
||||
+ dds_frequency: f32,
|
||||
+ system_clock_frequency: f32,
|
||||
+) -> Result<u32, Error> {
|
||||
+ // Output frequency should not exceed the Nyquist's frequency.
|
||||
+ if !(0.0..=(system_clock_frequency / 2.0)).contains(&dds_frequency) {
|
||||
+ return Err(Error::Bounds);
|
||||
+ }
|
||||
+ // The function for channel frequency is `f_out = FTW * f_s / 2^32`, where FTW is the
|
||||
+ // frequency tuning word and f_s is the system clock rate.
|
||||
+ Ok(((dds_frequency / system_clock_frequency) * (1u64 << 32) as f32) as u32)
|
||||
+}
|
||||
+
|
||||
+/// Convert phase into phase offset word.
|
||||
+///
|
||||
+/// Arguments:
|
||||
+/// * `phase_turns` - The normalized number of phase turns of a DDS channel.
|
||||
+///
|
||||
+/// Returns:
|
||||
+/// The corresponding phase offset word.
|
||||
+pub fn phase_to_pow(phase_turns: f32) -> Result<u16, Error> {
|
||||
+ Ok((phase_turns * (1 << 14) as f32) as u16 & 0x3FFFu16)
|
||||
+}
|
||||
+
|
||||
+/// Convert amplitude into amplitude control register values.
|
||||
+///
|
||||
+/// Arguments:
|
||||
+/// * `amplitude` - The normalized amplitude of a DDS channel.
|
||||
+///
|
||||
+/// Returns:
|
||||
+/// The corresponding value in the amplitude control register.
|
||||
+pub fn amplitude_to_acr(amplitude: f32) -> Result<u32, Error> {
|
||||
+ if !(0.0..=1.0).contains(&litude) {
|
||||
+ return Err(Error::Bounds);
|
||||
+ }
|
||||
+
|
||||
+ let acr: u32 = *0u32
|
||||
+ .set_bits(0..=9, ((amplitude * (1 << 10) as f32) as u32) & 0x3FF)
|
||||
+ .set_bit(12, amplitude != 1.0);
|
||||
+
|
||||
+ Ok(acr as u32)
|
||||
+}
|
||||
+
|
||||
/// Represents a means of serializing a DDS profile for writing to a stream.
|
||||
pub struct ProfileSerializer {
|
||||
// heapless::Vec<u8, 32>, especially its extend_from_slice() is slow
|
||||
@@ -566,6 +676,39 @@ impl ProfileSerializer {
|
||||
}
|
||||
}
|
||||
|
||||
+ /// Update the system clock configuration.
|
||||
+ ///
|
||||
+ /// # Args
|
||||
+ /// * `reference_clock_frequency` - The reference clock frequency provided to the AD9959 core.
|
||||
+ /// * `multiplier` - The frequency multiplier of the system clock. Must be 1 or 4-20.
|
||||
+ ///
|
||||
+ /// # Limitations
|
||||
+ /// The correctness of the FR1 register setting code rely on FR1\[0:17\] staying 0.
|
||||
+ pub fn set_system_clock(
|
||||
+ &mut self,
|
||||
+ reference_clock_frequency: f32,
|
||||
+ multiplier: u8,
|
||||
+ ) -> Result<f32, Error> {
|
||||
+ let frequency = reference_clock_frequency * multiplier as f32;
|
||||
+
|
||||
+ // The enabled channel will be updated after clock reconfig
|
||||
+ let mut fr1 = [0u8; 3];
|
||||
+
|
||||
+ // The ad9959 crate does not modify FR1[0:17]. These bits keep their default value.
|
||||
+ // These bits by default are 0.
|
||||
+ // Reading the register then update is not possible to implement in a serializer, where
|
||||
+ // many QSPI writes are performed in burst. Switching between read and write requires
|
||||
+ // breaking the QSPI indirect write mode and switch into the QSPI indirect read mode.
|
||||
+ fr1[0].set_bits(2..=6, multiplier);
|
||||
+
|
||||
+ // Frequencies within the VCO forbidden range (160e6, 255e6) are already rejected.
|
||||
+ let vco_range = HIGH_GAIN_VCO_RANGE.contains(&frequency);
|
||||
+ fr1[0].set_bit(7, vco_range);
|
||||
+
|
||||
+ self.add_write(Register::FR1, &fr1);
|
||||
+ Ok(frequency)
|
||||
+ }
|
||||
+
|
||||
/// Add a register write to the serialization data.
|
||||
fn add_write(&mut self, register: Register, value: &[u8]) {
|
||||
let data = &mut self.data[self.index..];
|
||||
diff --git a/src/bin/dual-iir.rs b/src/bin/dual-iir.rs
|
||||
index c7df3f603..dadd0523c 100644
|
||||
--- a/src/bin/dual-iir.rs
|
||||
+++ b/src/bin/dual-iir.rs
|
||||
@@ -44,6 +44,8 @@ use stabilizer::{
|
||||
afe::Gain,
|
||||
dac::{Dac0Output, Dac1Output, DacCode},
|
||||
hal,
|
||||
+ pounder::{ClockConfig, PounderConfig},
|
||||
+ setup::PounderDevices as Pounder,
|
||||
signal_generator::{self, SignalGenerator},
|
||||
timers::SamplingTimer,
|
||||
DigitalInput0, DigitalInput1, SystemTimer, Systick, AFE0, AFE1,
|
||||
@@ -145,6 +147,16 @@ pub struct Settings {
|
||||
/// See [signal_generator::BasicConfig#miniconf]
|
||||
#[miniconf(defer)]
|
||||
signal_generator: miniconf::Array<signal_generator::BasicConfig, 2>,
|
||||
+
|
||||
+ /// Specifies the config for pounder DDS clock configuration, DDS channels & attenuations
|
||||
+ ///
|
||||
+ /// # Path
|
||||
+ /// `pounder`
|
||||
+ ///
|
||||
+ /// # Value
|
||||
+ /// See [PounderConfig#miniconf]
|
||||
+ #[miniconf(defer)]
|
||||
+ pounder: miniconf::Option<PounderConfig>,
|
||||
}
|
||||
|
||||
impl Default for Settings {
|
||||
@@ -171,6 +183,8 @@ impl Default for Settings {
|
||||
.into(),
|
||||
|
||||
stream_target: StreamTarget::default(),
|
||||
+
|
||||
+ pounder: None.into(),
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -189,6 +203,7 @@ mod app {
|
||||
settings: Settings,
|
||||
telemetry: TelemetryBuffer,
|
||||
signal_generator: [SignalGenerator; 2],
|
||||
+ pounder: Option<Pounder>,
|
||||
}
|
||||
|
||||
#[local]
|
||||
@@ -199,6 +214,7 @@ mod app {
|
||||
adcs: (Adc0Input, Adc1Input),
|
||||
dacs: (Dac0Output, Dac1Output),
|
||||
iir_state: [[iir::Vec5<f32>; IIR_CASCADE_LENGTH]; 2],
|
||||
+ dds_clock_state: Option<ClockConfig>,
|
||||
generator: FrameGenerator,
|
||||
cpu_temp_sensor: stabilizer::hardware::cpu_temp_sensor::CpuTempSensor,
|
||||
}
|
||||
@@ -208,7 +224,7 @@ mod app {
|
||||
let clock = SystemTimer::new(|| monotonics::now().ticks() as u32);
|
||||
|
||||
// Configure the microcontroller
|
||||
- let (stabilizer, _pounder) = hardware::setup::setup(
|
||||
+ let (stabilizer, pounder) = hardware::setup::setup(
|
||||
c.core,
|
||||
c.device,
|
||||
clock,
|
||||
@@ -216,6 +232,13 @@ mod app {
|
||||
SAMPLE_TICKS,
|
||||
);
|
||||
|
||||
+ let dds_clock_state = pounder.as_ref().map(|_| ClockConfig::default());
|
||||
+
|
||||
+ let mut settings = Settings::default();
|
||||
+ if pounder.is_some() {
|
||||
+ settings.pounder.replace(PounderConfig::default());
|
||||
+ }
|
||||
+
|
||||
let mut network = NetworkUsers::new(
|
||||
stabilizer.net.stack,
|
||||
stabilizer.net.phy,
|
||||
@@ -226,13 +249,12 @@ mod app {
|
||||
.unwrap_or("10.34.16.1")
|
||||
.parse()
|
||||
.unwrap(),
|
||||
+ settings,
|
||||
);
|
||||
|
||||
let generator = network
|
||||
.configure_streaming(StreamFormat::AdcDacData, BATCH_SIZE as _);
|
||||
|
||||
- let settings = Settings::default();
|
||||
-
|
||||
let shared = Shared {
|
||||
network,
|
||||
settings,
|
||||
@@ -249,6 +271,7 @@ mod app {
|
||||
.unwrap(),
|
||||
),
|
||||
],
|
||||
+ pounder,
|
||||
};
|
||||
|
||||
let mut local = Local {
|
||||
@@ -258,6 +281,7 @@ mod app {
|
||||
adcs: stabilizer.adcs,
|
||||
dacs: stabilizer.dacs,
|
||||
iir_state: [[[0.; 5]; IIR_CASCADE_LENGTH]; 2],
|
||||
+ dds_clock_state,
|
||||
generator,
|
||||
cpu_temp_sensor: stabilizer.temperature_sensor,
|
||||
};
|
||||
@@ -407,7 +431,7 @@ mod app {
|
||||
}
|
||||
}
|
||||
|
||||
- #[task(priority = 1, local=[afes], shared=[network, settings, signal_generator])]
|
||||
+ #[task(priority = 1, local=[afes, dds_clock_state], shared=[network, settings, signal_generator, pounder])]
|
||||
fn settings_update(mut c: settings_update::Context) {
|
||||
let settings = c.shared.network.lock(|net| *net.miniconf.settings());
|
||||
c.shared.settings.lock(|current| *current = settings);
|
||||
@@ -431,15 +455,28 @@ mod app {
|
||||
}
|
||||
}
|
||||
|
||||
+ // Update Pounder configurations
|
||||
+ c.shared.pounder.lock(|pounder| {
|
||||
+ if let Some(pounder) = pounder {
|
||||
+ let pounder_settings = settings.pounder.as_ref().unwrap();
|
||||
+ let mut clocking = c.local.dds_clock_state.unwrap();
|
||||
+ pounder.update_dds(*pounder_settings, &mut clocking);
|
||||
+ }
|
||||
+ });
|
||||
+
|
||||
let target = settings.stream_target.into();
|
||||
c.shared.network.lock(|net| net.direct_stream(target));
|
||||
}
|
||||
|
||||
- #[task(priority = 1, shared=[network, settings, telemetry], local=[cpu_temp_sensor])]
|
||||
+ #[task(priority = 1, shared=[network, settings, telemetry, pounder], local=[cpu_temp_sensor])]
|
||||
fn telemetry(mut c: telemetry::Context) {
|
||||
let telemetry: TelemetryBuffer =
|
||||
c.shared.telemetry.lock(|telemetry| *telemetry);
|
||||
|
||||
+ let pounder_telemetry = c.shared.pounder.lock(|pounder| {
|
||||
+ pounder.as_mut().map(|pounder| pounder.get_telemetry())
|
||||
+ });
|
||||
+
|
||||
let (gains, telemetry_period) = c
|
||||
.shared
|
||||
.settings
|
||||
@@ -450,6 +487,7 @@ mod app {
|
||||
gains[0],
|
||||
gains[1],
|
||||
c.local.cpu_temp_sensor.get_temperature().unwrap(),
|
||||
+ pounder_telemetry,
|
||||
))
|
||||
});
|
||||
|
||||
diff --git a/src/bin/lockin.rs b/src/bin/lockin.rs
|
||||
index 6896df7ff..1e92a0f75 100644
|
||||
--- a/src/bin/lockin.rs
|
||||
+++ b/src/bin/lockin.rs
|
||||
@@ -254,6 +254,8 @@ mod app {
|
||||
SAMPLE_TICKS,
|
||||
);
|
||||
|
||||
+ let settings = Settings::default();
|
||||
+
|
||||
let mut network = NetworkUsers::new(
|
||||
stabilizer.net.stack,
|
||||
stabilizer.net.phy,
|
||||
@@ -264,6 +266,7 @@ mod app {
|
||||
.unwrap_or("10.34.16.1")
|
||||
.parse()
|
||||
.unwrap(),
|
||||
+ settings,
|
||||
);
|
||||
|
||||
let generator = network
|
||||
@@ -272,7 +275,7 @@ mod app {
|
||||
let shared = Shared {
|
||||
network,
|
||||
telemetry: TelemetryBuffer::default(),
|
||||
- settings: Settings::default(),
|
||||
+ settings,
|
||||
};
|
||||
|
||||
let signal_config = signal_generator::Config {
|
||||
@@ -499,6 +502,7 @@ mod app {
|
||||
gains[0],
|
||||
gains[1],
|
||||
c.local.cpu_temp_sensor.get_temperature().unwrap(),
|
||||
+ None,
|
||||
))
|
||||
});
|
||||
|
||||
diff --git a/src/hardware/pounder/attenuators.rs b/src/hardware/pounder/attenuators.rs
|
||||
index ef22814d4..a5d220dfb 100644
|
||||
--- a/src/hardware/pounder/attenuators.rs
|
||||
+++ b/src/hardware/pounder/attenuators.rs
|
||||
@@ -54,10 +54,9 @@ pub trait AttenuatorInterface {
|
||||
fn get_attenuation(&mut self, channel: Channel) -> Result<f32, Error> {
|
||||
let mut channels = [0_u8; 4];
|
||||
|
||||
- // Reading the data always shifts data out of the staging registers, so we perform a
|
||||
- // duplicate write-back to ensure the staging register is always equal to the output
|
||||
- // register.
|
||||
- self.transfer_attenuators(&mut channels)?;
|
||||
+ // Reading the data always shifts data out of the staging registers, so a duplicate
|
||||
+ // write-back will be performed to ensure the staging register is always equal to the
|
||||
+ // output register.
|
||||
self.transfer_attenuators(&mut channels)?;
|
||||
|
||||
// The attenuation code is stored in the upper 6 bits of the register, where each LSB
|
||||
@@ -68,6 +67,9 @@ pub trait AttenuatorInterface {
|
||||
// care) would contain erroneous data.
|
||||
let attenuation_code = (!channels[channel as usize]) >> 2;
|
||||
|
||||
+ // The write-back transfer is performed. Staging register is now restored.
|
||||
+ self.transfer_attenuators(&mut channels)?;
|
||||
+
|
||||
// Convert the desired channel code into dB of attenuation.
|
||||
Ok(attenuation_code as f32 / 2.0)
|
||||
}
|
||||
diff --git a/src/hardware/pounder/dds_output.rs b/src/hardware/pounder/dds_output.rs
|
||||
index 9af23a9aa..559855fcc 100644
|
||||
--- a/src/hardware/pounder/dds_output.rs
|
||||
+++ b/src/hardware/pounder/dds_output.rs
|
||||
@@ -55,7 +55,7 @@
|
||||
use log::warn;
|
||||
use stm32h7xx_hal as hal;
|
||||
|
||||
-use super::{hrtimer::HighResTimerE, QspiInterface};
|
||||
+use super::{hrtimer::HighResTimerE, Profile, QspiInterface};
|
||||
use ad9959::{Channel, Mode, ProfileSerializer};
|
||||
|
||||
/// The DDS profile update stream.
|
||||
@@ -157,6 +157,46 @@ impl<'a> ProfileBuilder<'a> {
|
||||
self
|
||||
}
|
||||
|
||||
+ /// Update a number of channels with fully defined profile settings.
|
||||
+ ///
|
||||
+ /// # Args
|
||||
+ /// * `channels` - A set of channels to apply the configuration to.
|
||||
+ /// * `profile` - The complete DDS profile, which defines the frequency tuning word,
|
||||
+ /// amplitude control register & the phase offset word of the channels.
|
||||
+ /// # Note
|
||||
+ /// The ACR should be stored in the 3 LSB of the word.
|
||||
+ /// If amplitude scaling is to be used, the "Amplitude multiplier enable" bit must be set.
|
||||
+ #[inline]
|
||||
+ pub fn update_channels_with_profile(
|
||||
+ &mut self,
|
||||
+ channels: Channel,
|
||||
+ profile: Profile,
|
||||
+ ) -> &mut Self {
|
||||
+ self.serializer.update_channels(
|
||||
+ channels,
|
||||
+ Some(profile.frequency_tuning_word),
|
||||
+ Some(profile.phase_offset),
|
||||
+ Some(profile.amplitude_control),
|
||||
+ );
|
||||
+ self
|
||||
+ }
|
||||
+
|
||||
+ /// Update the system clock configuration.
|
||||
+ ///
|
||||
+ /// # Args
|
||||
+ /// * `reference_clock_frequency` - The reference clock frequency provided to the AD9959 core.
|
||||
+ /// * `multiplier` - The frequency multiplier of the system clock. Must be 1 or 4-20.
|
||||
+ #[inline]
|
||||
+ pub fn set_system_clock(
|
||||
+ &mut self,
|
||||
+ reference_clock_frequency: f32,
|
||||
+ multiplier: u8,
|
||||
+ ) -> Result<&mut Self, ad9959::Error> {
|
||||
+ self.serializer
|
||||
+ .set_system_clock(reference_clock_frequency, multiplier)?;
|
||||
+ Ok(self)
|
||||
+ }
|
||||
+
|
||||
/// Write the profile to the DDS asynchronously.
|
||||
#[allow(dead_code)]
|
||||
#[inline]
|
||||
diff --git a/src/hardware/pounder/mod.rs b/src/hardware/pounder/mod.rs
|
||||
index d6dd654fc..1e436f785 100644
|
||||
--- a/src/hardware/pounder/mod.rs
|
||||
+++ b/src/hardware/pounder/mod.rs
|
||||
@@ -1,10 +1,17 @@
|
||||
use self::attenuators::AttenuatorInterface;
|
||||
|
||||
use super::hal;
|
||||
-use crate::hardware::{shared_adc::AdcChannel, I2c1Proxy};
|
||||
+use crate::hardware::{setup, shared_adc::AdcChannel, I2c1Proxy};
|
||||
+use crate::net::telemetry::PounderTelemetry;
|
||||
+use ad9959::{
|
||||
+ amplitude_to_acr, frequency_to_ftw, phase_to_pow, validate_clocking,
|
||||
+};
|
||||
use embedded_hal::blocking::spi::Transfer;
|
||||
use enum_iterator::Sequence;
|
||||
+use miniconf::Miniconf;
|
||||
+use rf_power::PowerMeasurementInterface;
|
||||
use serde::{Deserialize, Serialize};
|
||||
+use stm32h7xx_hal::time::MegaHertz;
|
||||
|
||||
pub mod attenuators;
|
||||
pub mod dds_output;
|
||||
@@ -91,40 +98,98 @@ impl From<Channel> for GpioPin {
|
||||
}
|
||||
}
|
||||
|
||||
-#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
|
||||
-pub struct DdsChannelState {
|
||||
- pub phase_offset: f32,
|
||||
+#[derive(Serialize, Deserialize, Copy, Clone, Debug, Miniconf)]
|
||||
+pub struct DdsChannelConfig {
|
||||
pub frequency: f32,
|
||||
+ pub phase_offset: f32,
|
||||
pub amplitude: f32,
|
||||
- pub enabled: bool,
|
||||
}
|
||||
|
||||
-#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
|
||||
-pub struct ChannelState {
|
||||
- pub parameters: DdsChannelState,
|
||||
- pub attenuation: f32,
|
||||
+impl Default for DdsChannelConfig {
|
||||
+ fn default() -> Self {
|
||||
+ Self {
|
||||
+ frequency: 0.0,
|
||||
+ phase_offset: 0.0,
|
||||
+ amplitude: 0.0,
|
||||
+ }
|
||||
+ }
|
||||
}
|
||||
|
||||
-#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
|
||||
-pub struct InputChannelState {
|
||||
- pub attenuation: f32,
|
||||
- pub power: f32,
|
||||
- pub mixer: DdsChannelState,
|
||||
+/// Represents a fully defined DDS profile, with parameters expressed in machine units
|
||||
+pub struct Profile {
|
||||
+ /// A 32-bits representation of DDS frequency in relation to the system clock frequency.
|
||||
+ /// This value corresponds to the AD9959 CFTW0 register, which specifies the frequency
|
||||
+ /// of DDS channels.
|
||||
+ pub frequency_tuning_word: u32,
|
||||
+ /// The DDS phase offset. It corresponds to the AD9959 CPOW0 register, which specifies
|
||||
+ /// the phase offset of DDS channels.
|
||||
+ pub phase_offset: u16,
|
||||
+ /// Control amplitudes of DDS channels. It corresponds to the AD9959 ACR register, which
|
||||
+ /// controls the amplitude scaling factor of DDS channels.
|
||||
+ pub amplitude_control: u32,
|
||||
+}
|
||||
+
|
||||
+impl TryFrom<(ClockConfig, ChannelConfig)> for Profile {
|
||||
+ type Error = ad9959::Error;
|
||||
+
|
||||
+ fn try_from(
|
||||
+ (clocking, channel): (ClockConfig, ChannelConfig),
|
||||
+ ) -> Result<Self, Self::Error> {
|
||||
+ let system_clock_frequency =
|
||||
+ clocking.reference_clock * clocking.multiplier as f32;
|
||||
+ Ok(Profile {
|
||||
+ frequency_tuning_word: frequency_to_ftw(
|
||||
+ channel.dds.frequency,
|
||||
+ system_clock_frequency,
|
||||
+ )?,
|
||||
+ phase_offset: phase_to_pow(channel.dds.phase_offset)?,
|
||||
+ amplitude_control: amplitude_to_acr(channel.dds.amplitude)?,
|
||||
+ })
|
||||
+ }
|
||||
}
|
||||
|
||||
-#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
|
||||
-pub struct OutputChannelState {
|
||||
+#[derive(Serialize, Deserialize, Copy, Clone, Debug, Miniconf)]
|
||||
+pub struct ChannelConfig {
|
||||
+ #[miniconf(defer)]
|
||||
+ pub dds: DdsChannelConfig,
|
||||
pub attenuation: f32,
|
||||
- pub channel: DdsChannelState,
|
||||
}
|
||||
|
||||
-#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
|
||||
-pub struct DdsClockConfig {
|
||||
+impl Default for ChannelConfig {
|
||||
+ fn default() -> Self {
|
||||
+ ChannelConfig {
|
||||
+ dds: DdsChannelConfig::default(),
|
||||
+ attenuation: 31.5,
|
||||
+ }
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+#[derive(Serialize, Deserialize, Copy, Clone, Debug, PartialEq, Miniconf)]
|
||||
+pub struct ClockConfig {
|
||||
pub multiplier: u8,
|
||||
pub reference_clock: f32,
|
||||
pub external_clock: bool,
|
||||
}
|
||||
|
||||
+impl Default for ClockConfig {
|
||||
+ fn default() -> Self {
|
||||
+ Self {
|
||||
+ multiplier: 5,
|
||||
+ reference_clock: MegaHertz::MHz(100).to_Hz() as f32,
|
||||
+ external_clock: false,
|
||||
+ }
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+#[derive(Copy, Clone, Debug, Default, Miniconf)]
|
||||
+pub struct PounderConfig {
|
||||
+ pub clock: ClockConfig,
|
||||
+ #[miniconf(defer)]
|
||||
+ pub in_channel: miniconf::Array<ChannelConfig, 2>,
|
||||
+ #[miniconf(defer)]
|
||||
+ pub out_channel: miniconf::Array<ChannelConfig, 2>,
|
||||
+}
|
||||
+
|
||||
impl From<Channel> for ad9959::Channel {
|
||||
/// Translate pounder channels to DDS output channels.
|
||||
fn from(other: Channel) -> Self {
|
||||
@@ -489,3 +554,77 @@ impl rf_power::PowerMeasurementInterface for PounderDevices {
|
||||
Ok(adc_scale * 2.048)
|
||||
}
|
||||
}
|
||||
+
|
||||
+impl setup::PounderDevices {
|
||||
+ pub fn update_dds(
|
||||
+ &mut self,
|
||||
+ settings: PounderConfig,
|
||||
+ clocking: &mut ClockConfig,
|
||||
+ ) {
|
||||
+ if *clocking != settings.clock {
|
||||
+ match validate_clocking(
|
||||
+ settings.clock.reference_clock,
|
||||
+ settings.clock.multiplier,
|
||||
+ ) {
|
||||
+ Ok(_frequency) => {
|
||||
+ self.pounder
|
||||
+ .set_ext_clk(settings.clock.external_clock)
|
||||
+ .unwrap();
|
||||
+
|
||||
+ self.dds_output
|
||||
+ .builder()
|
||||
+ .set_system_clock(
|
||||
+ settings.clock.reference_clock,
|
||||
+ settings.clock.multiplier,
|
||||
+ )
|
||||
+ .unwrap()
|
||||
+ .write();
|
||||
+
|
||||
+ *clocking = settings.clock;
|
||||
+ }
|
||||
+ Err(err) => {
|
||||
+ log::error!("Invalid AD9959 clocking parameters: {:?}", err)
|
||||
+ }
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ for (channel_config, pounder_channel) in settings
|
||||
+ .in_channel
|
||||
+ .iter()
|
||||
+ .chain(settings.out_channel.iter())
|
||||
+ .zip([Channel::In0, Channel::In1, Channel::Out0, Channel::Out1])
|
||||
+ {
|
||||
+ match Profile::try_from((*clocking, *channel_config)) {
|
||||
+ Ok(dds_profile) => {
|
||||
+ self.dds_output
|
||||
+ .builder()
|
||||
+ .update_channels_with_profile(
|
||||
+ pounder_channel.into(),
|
||||
+ dds_profile,
|
||||
+ )
|
||||
+ .write();
|
||||
+
|
||||
+ if let Err(err) = self.pounder.set_attenuation(
|
||||
+ pounder_channel,
|
||||
+ channel_config.attenuation,
|
||||
+ ) {
|
||||
+ log::error!("Invalid attenuation settings: {:?}", err)
|
||||
+ }
|
||||
+ }
|
||||
+ Err(err) => {
|
||||
+ log::error!("Invalid AD9959 profile settings: {:?}", err)
|
||||
+ }
|
||||
+ }
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ pub fn get_telemetry(&mut self) -> PounderTelemetry {
|
||||
+ PounderTelemetry {
|
||||
+ temperature: self.pounder.lm75.read_temperature().unwrap(),
|
||||
+ input_power: [
|
||||
+ self.pounder.measure_power(Channel::In0).unwrap(),
|
||||
+ self.pounder.measure_power(Channel::In1).unwrap(),
|
||||
+ ],
|
||||
+ }
|
||||
+ }
|
||||
+}
|
||||
diff --git a/src/net/mod.rs b/src/net/mod.rs
|
||||
index f6372381b..9a88008f7 100644
|
||||
--- a/src/net/mod.rs
|
||||
+++ b/src/net/mod.rs
|
||||
@@ -43,7 +43,7 @@ pub enum NetworkState {
|
||||
}
|
||||
|
||||
/// A structure of Stabilizer's default network users.
|
||||
-pub struct NetworkUsers<S: Default + Miniconf + Clone, T: Serialize> {
|
||||
+pub struct NetworkUsers<S: Miniconf + Clone, T: Serialize> {
|
||||
pub miniconf: miniconf::MqttClient<S, NetworkReference, SystemTimer, 512>,
|
||||
pub processor: NetworkProcessor,
|
||||
stream: DataStream,
|
||||
@@ -53,7 +53,7 @@ pub struct NetworkUsers<S: Default + Miniconf + Clone, T: Serialize> {
|
||||
|
||||
impl<S, T> NetworkUsers<S, T>
|
||||
where
|
||||
- S: Default + Miniconf + Clone,
|
||||
+ S: Miniconf + Clone,
|
||||
T: Serialize,
|
||||
{
|
||||
/// Construct Stabilizer's default network users.
|
||||
@@ -65,6 +65,7 @@ where
|
||||
/// * `app` - The name of the application.
|
||||
/// * `mac` - The MAC address of the network.
|
||||
/// * `broker` - The IP address of the MQTT broker to use.
|
||||
+ /// * `settings` - The initial settings value
|
||||
///
|
||||
/// # Returns
|
||||
/// A new struct of network users.
|
||||
@@ -75,6 +76,7 @@ where
|
||||
app: &str,
|
||||
mac: smoltcp_nal::smoltcp::wire::EthernetAddress,
|
||||
broker: IpAddr,
|
||||
+ settings: S,
|
||||
) -> Self {
|
||||
let stack_manager =
|
||||
cortex_m::singleton!(: NetworkManager = NetworkManager::new(stack))
|
||||
@@ -91,7 +93,7 @@ where
|
||||
&prefix,
|
||||
broker,
|
||||
clock,
|
||||
- S::default(),
|
||||
+ settings,
|
||||
)
|
||||
.unwrap();
|
||||
|
||||
diff --git a/src/net/telemetry.rs b/src/net/telemetry.rs
|
||||
index c6e071f17..e35347037 100644
|
||||
--- a/src/net/telemetry.rs
|
||||
+++ b/src/net/telemetry.rs
|
||||
@@ -58,6 +58,23 @@ pub struct Telemetry {
|
||||
|
||||
/// The CPU temperature in degrees Celsius.
|
||||
pub cpu_temp: f32,
|
||||
+
|
||||
+ /// Measurements related to Pounder
|
||||
+ pub pounder: Option<PounderTelemetry>,
|
||||
+}
|
||||
+
|
||||
+/// The structure that holds the telemetry related to Pounder.
|
||||
+///
|
||||
+/// # Note
|
||||
+/// This structure should be generated on-demand by the buffer when required to minimize conversion
|
||||
+/// overhead.
|
||||
+#[derive(Copy, Clone, Serialize)]
|
||||
+pub struct PounderTelemetry {
|
||||
+ /// The Pounder temperature in degrees Celsius
|
||||
+ pub temperature: f32,
|
||||
+
|
||||
+ /// The detected RF power into IN channels
|
||||
+ pub input_power: [f32; 2],
|
||||
}
|
||||
|
||||
impl Default for TelemetryBuffer {
|
||||
@@ -77,10 +94,17 @@ impl TelemetryBuffer {
|
||||
/// * `afe0` - The current AFE configuration for channel 0.
|
||||
/// * `afe1` - The current AFE configuration for channel 1.
|
||||
/// * `cpu_temp` - The current CPU temperature.
|
||||
+ /// * `pounder` - The current Pounder telemetry.
|
||||
///
|
||||
/// # Returns
|
||||
/// The finalized telemetry structure that can be serialized and reported.
|
||||
- pub fn finalize(self, afe0: Gain, afe1: Gain, cpu_temp: f32) -> Telemetry {
|
||||
+ pub fn finalize(
|
||||
+ self,
|
||||
+ afe0: Gain,
|
||||
+ afe1: Gain,
|
||||
+ cpu_temp: f32,
|
||||
+ pounder: Option<PounderTelemetry>,
|
||||
+ ) -> Telemetry {
|
||||
let in0_volts = Into::<f32>::into(self.adcs[0]) / afe0.as_multiplier();
|
||||
let in1_volts = Into::<f32>::into(self.adcs[1]) / afe1.as_multiplier();
|
||||
|
||||
@@ -89,6 +113,7 @@ impl TelemetryBuffer {
|
||||
adcs: [in0_volts, in1_volts],
|
||||
dacs: [self.dacs[0].into(), self.dacs[1].into()],
|
||||
digital_inputs: self.digital_inputs,
|
||||
+ pounder,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
{ pkgs ? import <nixpkgs> {} }:
|
||||
|
||||
let
|
||||
jobs = import ./mcu-contrib/default.nix {
|
||||
jobs = import ./mcu/default.nix {
|
||||
mozillaOverlay = import <mozillaOverlay>;
|
||||
};
|
||||
in
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,119 @@
|
|||
{ # Use master branch of the overlay by default
|
||||
mozillaOverlay ? import (builtins.fetchTarball https://github.com/mozilla/nixpkgs-mozilla/archive/master.tar.gz),
|
||||
rustManifest ? ./channel-rust-nightly.toml
|
||||
}:
|
||||
|
||||
let
|
||||
pkgs = import <nixpkgs> { overlays = [ mozillaOverlay ]; };
|
||||
rustPlatform = pkgs.recurseIntoAttrs (pkgs.callPackage ./rustPlatform.nix {
|
||||
inherit rustManifest;
|
||||
});
|
||||
buildStm32Firmware = { name, src, cargoDepsName ? name, patchPhase ? "", extraNativeBuildInputs ? [], checkPhase ? "", doCheck ? true, binaryName ? name, extraCargoBuildArgs ? "" }:
|
||||
let
|
||||
cargoSha256Drv = pkgs.runCommand "${name}-cargosha256" { } ''
|
||||
cp "${src}/cargosha256.nix" $out
|
||||
'';
|
||||
in
|
||||
rustPlatform.buildRustPackage rec {
|
||||
inherit name cargoDepsName;
|
||||
version = "0.0.0";
|
||||
|
||||
inherit src;
|
||||
cargoSha256 = (import cargoSha256Drv);
|
||||
|
||||
inherit patchPhase;
|
||||
nativeBuildInputs = [ pkgs.llvm ] ++ extraNativeBuildInputs;
|
||||
buildPhase = ''
|
||||
export CARGO_HOME=$(mktemp -d cargo-home.XXX)
|
||||
cargo build --release --bin ${binaryName} ${extraCargoBuildArgs}
|
||||
'';
|
||||
|
||||
inherit checkPhase doCheck;
|
||||
# binaryName defaults to the `name` arg (i.e. the Rust package name);
|
||||
# it is used as the Cargo binary filename
|
||||
installPhase = ''
|
||||
mkdir -p $out $out/nix-support
|
||||
cp target/thumbv7em-none-eabihf/release/${binaryName} $out/${name}.elf
|
||||
echo file binary-dist $out/${name}.elf >> $out/nix-support/hydra-build-products
|
||||
llvm-objcopy -O binary target/thumbv7em-none-eabihf/release/${binaryName} $out/${name}.bin
|
||||
echo file binary-dist $out/${name}.bin >> $out/nix-support/hydra-build-products
|
||||
'';
|
||||
|
||||
dontFixup = true;
|
||||
};
|
||||
migen = (import ../artiq-fast/pkgs/python-deps.nix { inherit (pkgs) lib fetchgit fetchFromGitHub python3Packages; misoc-new = true; }).migen;
|
||||
in
|
||||
pkgs.lib.attrsets.mapAttrs'
|
||||
(name: value: pkgs.lib.attrsets.nameValuePair ("stabilizer-" + name)
|
||||
(buildStm32Firmware ({
|
||||
name = "stabilizer-" + name;
|
||||
# If binaryName is not specified, use the attribute name as binaryName by default.
|
||||
binaryName = name;
|
||||
cargoDepsName = "stabilizer";
|
||||
src = <stabilizerSrc>;
|
||||
patchPhase = ''
|
||||
substituteInPlace src/hardware/configuration.rs \
|
||||
--replace "IpAddress::v4(10, 34, 16, 103)" \
|
||||
"IpAddress::v4(192, 168, 1, 76)" \
|
||||
--replace "Ipv4Address::new(10, 34, 16, 1)" \
|
||||
"Ipv4Address::new(192, 168, 1, 1)"
|
||||
'';
|
||||
doCheck = false;
|
||||
} // value))) {
|
||||
dual-iir = {};
|
||||
dual-iir-pounder_v1_1 = {
|
||||
binaryName = "dual-iir";
|
||||
extraCargoBuildArgs = "--features pounder_v1_1";
|
||||
};
|
||||
lockin-external = {};
|
||||
lockin-external-pounder_v1_1 = {
|
||||
binaryName = "lockin-external";
|
||||
extraCargoBuildArgs = "--features pounder_v1_1";
|
||||
};
|
||||
lockin-internal = {};
|
||||
lockin-internal-pounder_v1_1 = {
|
||||
binaryName = "lockin-internal";
|
||||
extraCargoBuildArgs = "--features pounder_v1_1";
|
||||
};
|
||||
} //
|
||||
{
|
||||
thermostat = buildStm32Firmware {
|
||||
name = "thermostat";
|
||||
src = <thermostatSrc>;
|
||||
checkPhase = ''
|
||||
cargo test --target=${pkgs.rust.toRustTarget pkgs.stdenv.targetPlatform}
|
||||
'';
|
||||
};
|
||||
humpback-dds = buildStm32Firmware {
|
||||
name = "humpback-dds";
|
||||
src = <humpbackDdsSrc>;
|
||||
extraNativeBuildInputs = [
|
||||
(pkgs.python3.withPackages(ps: [ migen ]))
|
||||
pkgs.yosys
|
||||
pkgs.nextpnr
|
||||
pkgs.icestorm
|
||||
];
|
||||
};
|
||||
# openMMC build system breaks if host compiler is not available, so do not use stdenvNoCC here
|
||||
sayma-mmc = pkgs.stdenv.mkDerivation {
|
||||
name = "sayma-mmc";
|
||||
src = <saymaMmcSrc>;
|
||||
phases = [ "unpackPhase" "buildPhase" "installPhase" ];
|
||||
nativeBuildInputs = [ pkgs.cmake pkgs.gcc-arm-embedded ];
|
||||
buildPhase =
|
||||
''
|
||||
mkdir build
|
||||
cd build
|
||||
cmake .. -DBOARD=sayma -DBOARD_RTM=sayma -DVERSION= -DTARGET_CONTROLLER=LPC1776 -DCMAKE_BUILD_TYPE=Debug
|
||||
make
|
||||
'';
|
||||
installPhase =
|
||||
''
|
||||
mkdir $out
|
||||
cp out/* $out
|
||||
mkdir -p $out $out/nix-support
|
||||
echo file binary-dist $out/openMMC.axf >> $out/nix-support/hydra-build-products
|
||||
echo file binary-dist $out/openMMC.bin >> $out/nix-support/hydra-build-products
|
||||
'';
|
||||
};
|
||||
}
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
{ recurseIntoAttrs, stdenv, lib,
|
||||
makeRustPlatform,
|
||||
fetchurl, patchelf,
|
||||
rustManifest ? ./channel-rust-nightly.toml
|
||||
}:
|
||||
|
||||
let
|
||||
targets = [
|
||||
"thumbv7em-none-eabihf"
|
||||
];
|
||||
rustChannel =
|
||||
lib.rustLib.fromManifestFile rustManifest {
|
||||
inherit stdenv lib fetchurl patchelf;
|
||||
};
|
||||
rust =
|
||||
rustChannel.rust.override {
|
||||
inherit targets;
|
||||
};
|
||||
in
|
||||
makeRustPlatform {
|
||||
rustc = rust;
|
||||
cargo = rust;
|
||||
}
|
||||
29
web.nix
29
web.nix
|
|
@ -1,30 +1,7 @@
|
|||
let
|
||||
pkgs = import <nixpkgs> {};
|
||||
web-src = <webSrc>;
|
||||
nmigen-src = <nmigenSrc>;
|
||||
src = <webSrc>;
|
||||
in
|
||||
rec {
|
||||
web = pkgs.runCommand "web" {} "cd ${web-src}; ${pkgs.zola}/bin/zola build -o $out";
|
||||
sphinxcontrib-platformpicker = pkgs.python3Packages.buildPythonPackage rec {
|
||||
pname = "sphinxcontrib-platformpicker";
|
||||
version = "1.3";
|
||||
src = pkgs.fetchFromGitHub {
|
||||
owner = "whitequark";
|
||||
repo = "sphinxcontrib-platformpicker";
|
||||
rev = "v${version}";
|
||||
sha256 = "sha256-qKhi4QqYhU7CbNSpziFacXc/sWWPSuM3Nc/oWPmBivM=";
|
||||
};
|
||||
propagatedBuildInputs = [ pkgs.python3Packages.sphinx ];
|
||||
};
|
||||
nmigen-docs = pkgs.stdenvNoCC.mkDerivation {
|
||||
name = "nmigen-docs";
|
||||
src = nmigen-src;
|
||||
buildInputs = [ (pkgs.python3.withPackages(ps: [ ps.sphinx ps.sphinx_rtd_theme sphinxcontrib-platformpicker ])) ];
|
||||
phases = [ "buildPhase" ];
|
||||
buildPhase =
|
||||
''
|
||||
export PYTHONPATH=$src
|
||||
sphinx-build -b html $src/docs $out
|
||||
'';
|
||||
};
|
||||
{
|
||||
web = pkgs.runCommand "web" {} "cd ${src}; ${pkgs.zola}/bin/zola build -o $out";
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue