support now-pinning on RISC-V with wide data bus #97

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sb10q · 2021-11-13T12:02:09+08:00

sb10q commented

2021-11-13 12:02:09 +08:00

For FPGA design reasons, on RISC-V with 64-bit data bus (the rv32g target), the now value is split into two 32-bit values that are each padded to 64-bits.

This needs to be ported to NAC3:
0f660735bf

For FPGA design reasons, on RISC-V with 64-bit data bus (the ``rv32g`` target), the ``now`` value is split into two 32-bit values that are each padded to 64-bits. This needs to be ported to NAC3: https://github.com/m-labs/artiq/commit/0f660735bfb85d032277d1a1394d9465cb376250

ychenfo was assigned by sb10q

2021-11-13 12:02:09 +08:00

sb10q referenced this issue from a commit

2021-11-13 12:11:08 +08:00

nac3artiq: add stubs for now-pinning on rv32g (#97)

ychenfo referenced this issue from a commit

2021-11-16 17:38:00 +08:00

nac3artiq: support now-pinning on RISC-V with wide data bus (#97)

ychenfo referenced this issue

2021-11-16 17:41:50 +08:00

nac3artiq: support now-pinning on RISC-V with wide data bus (#97) #100

sb10q closed this issue