meta: Allow specifying compiler arguments for check_demos

We can try to optimize for the host and Cortex-A9 chips; The RISC-V
ISAs do not target specific chips, so we will fallback to using the
generic CPU.

nac3artiq/src/lib.rs

@@ -692,7 +692,7 @@ impl Nac3 {
     fn get_llvm_target_cpu(isa: Isa) -> String {
         match isa {
             Isa::Host => TargetMachine::get_host_cpu_name().to_string(),
-            Isa::RiscV32G | Isa::RiscV32IMA => "rv32-generic".to_string(),
+            Isa::RiscV32G | Isa::RiscV32IMA => "generic-rv32".to_string(),
             Isa::CortexA9 => "cortex-a9".to_string(),
         }
     }