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3 Commits
1d0356e3c4
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5668fd9254
Author | SHA1 | Date |
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David Mak | 5668fd9254 | |
David Mak | 6db0157b79 | |
David Mak | 297d07f116 |
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@ -12,7 +12,7 @@ use inkwell::{
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targets::*,
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OptimizationLevel,
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};
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use nac3core::codegen::gen_func_impl;
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use nac3core::codegen::{CodeGenLLVMOptions, gen_func_impl};
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use nac3core::toplevel::builtins::get_exn_constructor;
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use nac3core::typecheck::typedef::{TypeEnum, Unifier};
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use nac3parser::{
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@ -97,7 +97,8 @@ struct Nac3 {
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top_levels: Vec<TopLevelComponent>,
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string_store: Arc<RwLock<HashMap<String, i32>>>,
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exception_ids: Arc<RwLock<HashMap<usize, usize>>>,
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deferred_eval_store: DeferredEvaluationStore
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deferred_eval_store: DeferredEvaluationStore,
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llvm_options: CodeGenLLVMOptions,
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}
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create_exception!(nac3artiq, CompileError, exceptions::PyException);
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@ -551,6 +552,7 @@ impl Nac3 {
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unifier_index: instance.unifier_id,
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calls: instance.calls,
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id: 0,
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llvm_options: self.llvm_options,
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};
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let mut store = ConcreteTypeStore::new();
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@ -568,6 +570,7 @@ impl Nac3 {
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unifier_index: instance.unifier_id,
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calls: Arc::new(Default::default()),
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id: 0,
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llvm_options: self.llvm_options,
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};
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let membuffers: Arc<Mutex<Vec<Vec<u8>>>> = Default::default();
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@ -885,6 +888,10 @@ impl Nac3 {
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string_store: Default::default(),
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exception_ids: Default::default(),
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deferred_eval_store: DeferredEvaluationStore::new(),
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llvm_options: CodeGenLLVMOptions {
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opt_level: OptimizationLevel::Default,
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emit_llvm: false,
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}
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})
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}
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@ -601,8 +601,7 @@ pub fn gen_func_instance<'ctx, 'a>(
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store,
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unifier_index: instance.unifier_id,
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id,
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opt_level: ctx.opt_level,
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emit_llvm: ctx.emit_llvm,
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llvm_options: ctx.llvm_options,
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});
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Ok(symbol)
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} else {
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@ -59,6 +59,15 @@ lazy_static!(
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static ref PASSES_INIT_LOCK: Mutex<AtomicBool> = Mutex::new(AtomicBool::new(true));
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);
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/// Additional options for LLVM during codegen.
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#[derive(Copy, Clone, Debug, Eq, PartialEq)]
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pub struct CodeGenLLVMOptions {
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/// The optimization level to apply on the generated LLVM IR.
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pub opt_level: OptimizationLevel,
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/// Whether to output the LLVM IR after generation is complete.
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pub emit_llvm: bool,
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}
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pub struct CodeGenContext<'ctx, 'a> {
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pub ctx: &'ctx Context,
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pub builder: Builder<'ctx>,
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@ -89,10 +98,8 @@ pub struct CodeGenContext<'ctx, 'a> {
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Option<(Vec<Option<BasicValueEnum<'ctx>>>, BasicBlock<'ctx>, PhiValue<'ctx>)>,
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pub need_sret: bool,
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pub current_loc: Location,
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/// The optimization level to apply on the generated LLVM IR.
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pub opt_level: OptimizationLevel,
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/// Whether to output the LLVM IR after generation is complete.
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pub emit_llvm: bool,
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/// Additional LLVM options for Codegen
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pub llvm_options: CodeGenLLVMOptions,
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}
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impl<'ctx, 'a> CodeGenContext<'ctx, 'a> {
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@ -238,11 +245,11 @@ impl WorkerRegistry {
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{
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let _data = PASSES_INIT_LOCK.lock();
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let pass_builder = PassManagerBuilder::create();
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pass_builder.set_optimization_level(task.opt_level);
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pass_builder.set_optimization_level(task.llvm_options.opt_level);
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pass_builder.populate_function_pass_manager(&passes);
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}
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let emit_llvm = task.emit_llvm;
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let emit_llvm = task.llvm_options.emit_llvm;
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match gen_func(&context, generator, self, builder, module, task) {
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Ok(result) => {
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@ -294,10 +301,8 @@ pub struct CodeGenTask {
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pub unifier_index: usize,
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pub resolver: Arc<dyn SymbolResolver + Send + Sync>,
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pub id: usize,
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/// The optimization level to apply on the generated LLVM IR.
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pub opt_level: OptimizationLevel,
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/// Whether to output the LLVM IR after generation is complete.
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pub emit_llvm: bool,
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/// Additional LLVM options for Codegen
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pub llvm_options: CodeGenLLVMOptions,
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}
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fn get_llvm_type<'ctx>(
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@ -641,7 +646,7 @@ pub fn gen_func_impl<'ctx, G: CodeGenerator, F: FnOnce(&mut G, &mut CodeGenConte
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),
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/* directory */ "",
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/* producer */ "NAC3",
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/* is_optimized */ task.opt_level != OptimizationLevel::None,
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/* is_optimized */ task.llvm_options.opt_level != OptimizationLevel::None,
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/* compiler command line flags */ "",
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/* runtime_ver */ 0,
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/* split_name */ "",
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@ -676,7 +681,7 @@ pub fn gen_func_impl<'ctx, G: CodeGenerator, F: FnOnce(&mut G, &mut CodeGenConte
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/* is_definition */ true,
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/* scope_line */ row as u32,
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/* flags */ inkwell::debug_info::DIFlags::PUBLIC,
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/* is_optimized */ task.opt_level != OptimizationLevel::None,
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/* is_optimized */ task.llvm_options.opt_level != OptimizationLevel::None,
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);
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fn_val.set_subprogram(func_scope);
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@ -703,8 +708,7 @@ pub fn gen_func_impl<'ctx, G: CodeGenerator, F: FnOnce(&mut G, &mut CodeGenConte
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need_sret: has_sret,
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current_loc: Default::default(),
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debug_info: (dibuilder, compile_unit, func_scope.as_debug_info_scope()),
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opt_level: task.opt_level,
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emit_llvm: task.emit_llvm,
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llvm_options: task.llvm_options,
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};
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let loc = code_gen_context.debug_info.0.create_debug_location(
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@ -1,7 +1,7 @@
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use crate::{
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codegen::{
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concrete_type::ConcreteTypeStore, CodeGenContext, CodeGenTask, DefaultCodeGenerator,
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WithCall, WorkerRegistry,
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concrete_type::ConcreteTypeStore, CodeGenContext, CodeGenLLVMOptions, CodeGenTask,
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DefaultCodeGenerator, WithCall, WorkerRegistry,
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},
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symbol_resolver::{SymbolResolver, ValueEnum},
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toplevel::{
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@ -13,6 +13,7 @@ use crate::{
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},
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};
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use indoc::indoc;
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use inkwell::OptimizationLevel;
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use nac3parser::{
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ast::{fold::Fold, StrRef},
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parser::parse_program,
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@ -157,6 +158,10 @@ fn test_primitives() {
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store,
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signature,
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id: 0,
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llvm_options: CodeGenLLVMOptions {
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opt_level: OptimizationLevel::Default,
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emit_llvm: false,
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},
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};
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let f = Arc::new(WithCall::new(Box::new(|module| {
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// the following IR is equivalent to
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@ -355,6 +360,10 @@ fn test_simple_call() {
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signature,
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store,
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id: 0,
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llvm_options: CodeGenLLVMOptions {
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opt_level: OptimizationLevel::Default,
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emit_llvm: false,
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},
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};
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let f = Arc::new(WithCall::new(Box::new(|module| {
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let expected = indoc! {"
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@ -11,8 +11,8 @@ use std::mem::transmute;
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use nac3core::{
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codegen::{
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concrete_type::ConcreteTypeStore, irrt::load_irrt, CodeGenTask, DefaultCodeGenerator,
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WithCall, WorkerRegistry,
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concrete_type::ConcreteTypeStore, irrt::load_irrt, CodeGenLLVMOptions, CodeGenTask,
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DefaultCodeGenerator, WithCall, WorkerRegistry,
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},
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symbol_resolver::SymbolResolver,
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toplevel::{
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@ -275,8 +275,10 @@ fn main() {
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unifier_index: instance.unifier_id,
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calls: instance.calls,
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id: 0,
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opt_level,
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emit_llvm,
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llvm_options: CodeGenLLVMOptions {
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opt_level,
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emit_llvm,
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},
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};
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let membuffers: Arc<Mutex<Vec<Vec<u8>>>> = Default::default();
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