nac3embedded: switch to Zynq (#24)

nac3embedded/device_db.py

@@ -1,13 +1,16 @@
 # python demo.py
 # artiq_run module.elf
 
-core_addr = "192.168.1.50"
-
 device_db = {
     "core": {
         "type": "local",
         "module": "artiq.coredevice.core",
         "class": "Core",
-        "arguments": {"host": core_addr, "ref_period": 1e-9}
-    }
+        "arguments": {
+            "host": "192.168.1.52",
+            "ref_period": 1e-9,
+            "ref_multiplier": 8,
+            "target": "cortexa9"
+        }
+    },
 }

nac3embedded/src/lib.rs

@@ -147,14 +147,18 @@ impl Nac3 {
             builder.populate_module_pass_manager(&passes);
             passes.run_on(module);
 
-            let triple = TargetTriple::create("riscv32-unknown-linux");
+            // For RISC-V (needs https://git.m-labs.hk/M-Labs/nac3/issues/24)
+            //let triple = TargetTriple::create("riscv32-unknown-linux");
+            //let features = "+a,+m";
+            let triple = TargetTriple::create("armv7-unknown-linux-gnueabihf");
+            let features = "+dsp,+fp16,+neon,+vfp3";
             let target =
                 Target::from_triple(&triple).expect("couldn't create target from target triple");
             let target_machine = target
                 .create_target_machine(
                     &triple,
                     "",
-                    "+a,+m",
+                    features,
                     OptimizationLevel::Default,
                     RelocMode::PIC,
                     CodeModel::Default,