core: Add opt_level and emit_llvm to CodeGen options

nac3core/src/codegen/expr.rs

@@ -601,6 +601,8 @@ pub fn gen_func_instance<'ctx, 'a>(
             store,
             unifier_index: instance.unifier_id,
             id,
+            opt_level: ctx.opt_level,
+            emit_llvm: ctx.emit_llvm,
         });
         Ok(symbol)
     } else {

nac3core/src/codegen/mod.rs

@@ -89,6 +89,10 @@ pub struct CodeGenContext<'ctx, 'a> {
         Option<(Vec<Option<BasicValueEnum<'ctx>>>, BasicBlock<'ctx>, PhiValue<'ctx>)>,
     pub need_sret: bool,
     pub current_loc: Location,
+    /// The optimization level to apply on the generated LLVM IR.
+    pub opt_level: OptimizationLevel,
+    /// Whether to output the LLVM IR after generation is complete.
+    pub emit_llvm: bool,
 }
 
 impl<'ctx, 'a> CodeGenContext<'ctx, 'a> {
@@ -225,24 +229,32 @@ impl WorkerRegistry {
             context.i32_type().const_int(4, false),
         );
 
-        let passes = PassManager::create(&module);
-
-        // HACK: This critical section is a work-around for issue
-        // https://git.m-labs.hk/M-Labs/nac3/issues/275
-        {
-            let _data = PASSES_INIT_LOCK.lock();
-            let pass_builder = PassManagerBuilder::create();
-            pass_builder.set_optimization_level(OptimizationLevel::Default);
-            pass_builder.populate_function_pass_manager(&passes);
-        }
-
         let mut errors = HashSet::new();
         while let Some(task) = self.receiver.recv().unwrap() {
+            let passes = PassManager::create(&module);
+
+            // HACK: This critical section is a work-around for issue
+            // https://git.m-labs.hk/M-Labs/nac3/issues/275
+            {
+                let _data = PASSES_INIT_LOCK.lock();
+                let pass_builder = PassManagerBuilder::create();
+                pass_builder.set_optimization_level(task.opt_level);
+                pass_builder.populate_function_pass_manager(&passes);
+            }
+
+            let emit_llvm = task.emit_llvm;
+
             match gen_func(&context, generator, self, builder, module, task) {
                 Ok(result) => {
                     builder = result.0;
                     passes.run_on(&result.2);
                     module = result.1;
+
+                    if emit_llvm {
+                        println!("LLVM IR for {}", module.get_name().to_str().unwrap());
+                        println!("{}", module.to_string());
+                        println!();
+                    }
                 }
                 Err((old_builder, e)) => {
                     builder = old_builder;
@@ -264,6 +276,7 @@ impl WorkerRegistry {
             println!("{}", err.to_string());
             panic!()
         }
+
         f.run(&module);
         let mut lock = self.task_count.lock();
         *lock += 1;
@@ -281,6 +294,10 @@ pub struct CodeGenTask {
     pub unifier_index: usize,
     pub resolver: Arc<dyn SymbolResolver + Send + Sync>,
     pub id: usize,
+    /// The optimization level to apply on the generated LLVM IR.
+    pub opt_level: OptimizationLevel,
+    /// Whether to output the LLVM IR after generation is complete.
+    pub emit_llvm: bool,
 }
 
 fn get_llvm_type<'ctx>(
@@ -624,7 +641,7 @@ pub fn gen_func_impl<'ctx, G: CodeGenerator, F: FnOnce(&mut G, &mut CodeGenConte
             ),
         /* directory */ "",
         /* producer */ "NAC3",
-        /* is_optimized */ true,
+        /* is_optimized */ task.opt_level != OptimizationLevel::None,
         /* compiler command line flags */ "",
         /* runtime_ver */ 0,
         /* split_name */ "",
@@ -659,7 +676,7 @@ pub fn gen_func_impl<'ctx, G: CodeGenerator, F: FnOnce(&mut G, &mut CodeGenConte
         /* is_definition */ true,
         /* scope_line */ row as u32,
         /* flags */ inkwell::debug_info::DIFlags::PUBLIC,
-        /* is_optimized */ true,
+        /* is_optimized */ task.opt_level != OptimizationLevel::None,
     );
     fn_val.set_subprogram(func_scope);
 
@@ -686,6 +703,8 @@ pub fn gen_func_impl<'ctx, G: CodeGenerator, F: FnOnce(&mut G, &mut CodeGenConte
         need_sret: has_sret,
         current_loc: Default::default(),
         debug_info: (dibuilder, compile_unit, func_scope.as_debug_info_scope()),
+        opt_level: task.opt_level,
+        emit_llvm: task.emit_llvm,
     };
 
     let loc = code_gen_context.debug_info.0.create_debug_location(

nac3standalone/src/main.rs

@@ -265,6 +265,8 @@ fn main() {
         unifier_index: instance.unifier_id,
         calls: instance.calls,
         id: 0,
+        opt_level: OptimizationLevel::Default,
+        emit_llvm: false,
     };
 
     let membuffers: Arc<Mutex<Vec<Vec<u8>>>> = Default::default();