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llvm: switch RISC-V ABI when FPU is present 

Patch is a bit of a hack and ignores 64-bit CPUs.

Also only build the LLVM targets we need.
pull/100/head
Sebastien Bourdeauducq 2021-11-11 22:46:48 +08:00
parent 96607432c1
commit 4547eee82a
3 changed files with 86 additions and 1 deletions
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14
flake.nix
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@ -5,7 +5,14 @@
outputs = { self, nixpkgs }:
let
pkgs = import nixpkgs { system = "x86_64-linux"; };
# We can't use overlays because llvm dependencies are handled internally in llvmPackages_xx
pkgs-orig = import nixpkgs { system = "x86_64-linux"; };
nixpkgs-patched = pkgs-orig.applyPatches {
name = "nixpkgs";
src = nixpkgs;
patches = [ ./llvm-future-riscv-abi.diff ./llvm-restrict-targets.diff ];
};
pkgs = import nixpkgs-patched { system = "x86_64-linux"; };
in rec {
packages.x86_64-linux = {
nac3artiq = pkgs.python3Packages.toPythonModule (
@ -47,4 +54,9 @@
inherit (packages.x86_64-linux) nac3artiq;
};
};
nixConfig = {
binaryCachePublicKeys = ["nixbld.m-labs.hk-1:5aSRVA5b320xbNvu30tqxVPXpld73bhtOeH6uAjRyHc="];
binaryCaches = ["https://nixbld.m-labs.hk" "https://cache.nixos.org"];
};
}

61
llvm-future-riscv-abi.diff Normal file
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@ -0,0 +1,61 @@
commit 6e2dea56207b4e52ade9d1eee6a4f198336dd0a6
Author: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Thu Nov 11 23:32:13 2021 +0800
llvm: switch RISC-V ABI when FPU is present
diff --git a/pkgs/development/compilers/llvm/12/llvm/default.nix b/pkgs/development/compilers/llvm/12/llvm/default.nix
index 30a1a7a16df..41b7211b2a5 100644
--- a/pkgs/development/compilers/llvm/12/llvm/default.nix
+++ b/pkgs/development/compilers/llvm/12/llvm/default.nix
@@ -66,6 +66,7 @@ in stdenv.mkDerivation (rec {
sha256 = "sha256:12s8vr6ibri8b48h2z38f3afhwam10arfiqfy4yg37bmc054p5hi";
stripLen = 1;
})
+ ./llvm-future-riscv-abi.diff
] ++ lib.optional enablePolly ./gnu-install-dirs-polly.patch;
postPatch = optionalString stdenv.isDarwin ''
@@ -183,7 +184,7 @@ in stdenv.mkDerivation (rec {
cp NATIVE/bin/llvm-config $dev/bin/llvm-config-native
'';
- doCheck = stdenv.isLinux && (!stdenv.isx86_32) && (!stdenv.hostPlatform.isMusl);
+ doCheck = false; # the ABI change breaks RISC-V FP tests
checkTarget = "check-all";
diff --git a/pkgs/development/compilers/llvm/12/llvm/llvm-future-riscv-abi.diff b/pkgs/development/compilers/llvm/12/llvm/llvm-future-riscv-abi.diff
new file mode 100644
index 00000000000..2427ed0e02c
--- /dev/null
+++ b/pkgs/development/compilers/llvm/12/llvm/llvm-future-riscv-abi.diff
@@ -0,0 +1,28 @@
+diff --git a/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp b/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
+index 0aba18b20..9bb75e7f4 100644
+--- a/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
++++ b/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
+@@ -33,6 +33,8 @@ ABI computeTargetABI(const Triple &TT, FeatureBitset FeatureBits,
+ auto TargetABI = getTargetABI(ABIName);
+ bool IsRV64 = TT.isArch64Bit();
+ bool IsRV32E = FeatureBits[RISCV::FeatureRV32E];
++ bool IsRV32D = FeatureBits[RISCV::FeatureStdExtD];
++ bool IsRV32F = FeatureBits[RISCV::FeatureStdExtF];
+
+ if (!ABIName.empty() && TargetABI == ABI_Unknown) {
+ errs()
+@@ -56,10 +58,10 @@ ABI computeTargetABI(const Triple &TT, FeatureBitset FeatureBits,
+ if (TargetABI != ABI_Unknown)
+ return TargetABI;
+
+- // For now, default to the ilp32/ilp32e/lp64 ABI if no explicit ABI is given
+- // or an invalid/unrecognised string is given. In the future, it might be
+- // worth changing this to default to ilp32f/lp64f and ilp32d/lp64d when
+- // hardware support for floating point is present.
++ if (IsRV32D)
++ return ABI_ILP32D;
++ if (IsRV32F)
++ return ABI_ILP32F;
+ if (IsRV32E)
+ return ABI_ILP32E;
+ if (IsRV64)

12
llvm-restrict-targets.diff Normal file
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@ -0,0 +1,12 @@
diff --git a/pkgs/development/compilers/llvm/12/llvm/default.nix b/pkgs/development/compilers/llvm/12/llvm/default.nix
index 41b7211b2a5..dfc707f034d 100644
--- a/pkgs/development/compilers/llvm/12/llvm/default.nix
+++ b/pkgs/development/compilers/llvm/12/llvm/default.nix
@@ -127,6 +127,7 @@ in stdenv.mkDerivation (rec {
"-DLLVM_HOST_TRIPLE=${stdenv.hostPlatform.config}"
"-DLLVM_DEFAULT_TARGET_TRIPLE=${stdenv.hostPlatform.config}"
"-DLLVM_ENABLE_DUMP=ON"
+ "-DLLVM_TARGETS_TO_BUILD=X86:ARM;RISCV"
] ++ optionals enableSharedLibraries [
"-DLLVM_LINK_LLVM_DYLIB=ON"
] ++ optionals enableManpages [