From 3a1dd893a1a3c8698eda9d6deb91967c52d6eec4 Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Sun, 10 Oct 2021 17:45:38 +0800
Subject: [PATCH] nac3artiq/demo: get closer to regular ARTIQ

---
 nac3artiq/demo.py      | 20 +++++++-------------
 nac3artiq/device_db.py |  4 ++--
 nac3artiq/min_artiq.py | 41 +++++++++++++++++++++++++++++++++--------
 3 files changed, 42 insertions(+), 23 deletions(-)

diff --git a/nac3artiq/demo.py b/nac3artiq/demo.py
index 8daf4985..993187b0 100644
--- a/nac3artiq/demo.py
+++ b/nac3artiq/demo.py
@@ -1,30 +1,24 @@
 from min_artiq import *
-from numpy import int32, int64
-
 
 @kernel
 class Demo:
     core: Core
     led: TTLOut
 
-    @portable
     def __init__(self):
         self.core = Core()
-        self.led = TTLOut(0)
+        self.led = TTLOut(self.core, 19)
 
     @kernel
-    def run(self):
+    def run_k(self):
         self.core.reset()
         while True:
-            self.led.pulse_mu(int64(100000000))
-            delay_mu(int64(True))
+            self.led.pulse(100.*ms)
+            self.core.delay(100.*ms)
 
+    def run(self):
+        self.core.run(self.run_k)
 
-@kernel
-def testing(a: int32) -> int32:
-    return a + 1
 
 if __name__ == "__main__":
-    core = Core()
-    # core.run(testing, 1)
-    core.run(Demo().run)
+    Demo().run()
diff --git a/nac3artiq/device_db.py b/nac3artiq/device_db.py
index 558af7d5..d8ccfd79 100644
--- a/nac3artiq/device_db.py
+++ b/nac3artiq/device_db.py
@@ -7,10 +7,10 @@ device_db = {
         "module": "artiq.coredevice.core",
         "class": "Core",
         "arguments": {
-            "host": "192.168.1.52",
+            "host": "kc705",
             "ref_period": 1e-9,
             "ref_multiplier": 8,
-            "target": "cortexa9"
+            "target": "riscv"
         }
     },
 }
diff --git a/nac3artiq/min_artiq.py b/nac3artiq/min_artiq.py
index dd5a1f8a..fb743faa 100644
--- a/nac3artiq/min_artiq.py
+++ b/nac3artiq/min_artiq.py
@@ -5,13 +5,13 @@ from numpy import int32, int64
 
 import nac3artiq
 
+__all__ = ["KernelInvariant", "extern", "kernel", "portable", "ms", "us", "ns", "Core", "TTLOut"]
+
+
 import device_db
+core_arguments = device_db.device_db["core"]["arguments"]
 
-
-__all__ = ["KernelInvariant", "extern", "kernel", "portable", "Core", "TTLOut"]
-
-
-nac3 = nac3artiq.NAC3(device_db.device_db["core"]["arguments"]["target"])
+nac3 = nac3artiq.NAC3(core_arguments["target"])
 allow_module_registration = True
 registered_ids = set()
 
@@ -55,6 +55,10 @@ def get_defined_class(method):
     return vars(sys.modules[method.__module__])[method.__qualname__.split('.')[0]]
 
 
+ms = 1e-3
+us = 1e-6
+ns = 1e-9
+
 @extern
 def rtio_init():
     raise NotImplementedError("syscall not simulated")
@@ -82,9 +86,10 @@ def rtio_input_data(channel: int32) -> int32:
 
 @kernel
 class Core:
-    @portable
+    ref_period: float
+
     def __init__(self):
-        pass
+        self.ref_period = core_arguments["ref_period"]
 
     def run(self, method, *args, **kwargs):
         global allow_module_registration
@@ -112,14 +117,28 @@ class Core:
         if now_mu() < min_now:
             at_mu(min_now)
 
+    @portable
+    def seconds_to_mu(self, seconds: float) -> int64:
+        return int64(round(seconds/self.ref_period))
+
+    @portable
+    def mu_to_seconds(self, mu: int64) -> float:
+        return float(mu)*self.ref_period
+
+    @kernel
+    def delay(self, dt: float):
+        delay_mu(self.seconds_to_mu(dt))
+
 
 @kernel
 class TTLOut:
+    core: Core
     channel: int32
     target_o: int32
 
     @portable
-    def __init__(self, channel: int32):
+    def __init__(self, core: Core, channel: int32):
+        self.core = core
         self.channel = channel
         self.target_o = channel << 8
 
@@ -144,3 +163,9 @@ class TTLOut:
         self.on()
         delay_mu(duration)
         self.off()
+
+    @kernel
+    def pulse(self, duration: float):
+        self.on()
+        self.core.delay(duration)
+        self.off()